mb/dell: Convert Latitude E7240 into a variant

In preparation for adding additional Haswell based Dell Latitude
laptops, rework the E7240 port to use a variant scheme.

TEST=Timeless build with CONFIG_INCLUDE_CONFIG_FILE=n for the E7240 did
not change between main and this commit

Change-Id: I3031910db6d817824320320f137b0f99cdfe1d9a
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

src/mainboard/dell/e7240/Makefile.mk

@@ -1,5 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += bootblock.c
-romstage-y += gpio.c
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads

src/mainboard/dell/haswell_latitude/Kconfig

@@ -1,26 +1,38 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
-if BOARD_DELL_LATITUDE_E7240
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select BOARD_ROMSIZE_KB_8192
+config BOARD_DELL_HASWELL_LATITUDE_COMMON
+	def_bool n
 	select EC_DELL_MEC5035
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
-	select INTEL_LYNXPOINT_LP
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_USES_IFD_GBE_REGION
 	select NORTHBRIDGE_INTEL_HASWELL
 	select SERIRQ_CONTINUOUS_MODE
 	select SOUTHBRIDGE_INTEL_LYNXPOINT
 	select SYSTEM_TYPE_LAPTOP
 
+config BOARD_DELL_LATITUDE_E7240
+	select BOARD_DELL_HASWELL_LATITUDE_COMMON
+	select BOARD_ROMSIZE_KB_8192
+	select INTEL_LYNXPOINT_LP
+	select MAINBOARD_USES_IFD_GBE_REGION
+
+if BOARD_DELL_HASWELL_LATITUDE_COMMON
+
 config MAINBOARD_DIR
-	default "dell/e7240"
+	default "dell/haswell_latitude"
 
 config MAINBOARD_PART_NUMBER
-	default "Latitude E7240"
+	default "Latitude E7240" if BOARD_DELL_LATITUDE_E7240
+
+config DEVICETREE
+	default "devicetree_lp.cb" if INTEL_LYNXPOINT_LP
+
+config VARIANT_DIR
+	default "e7240" if BOARD_DELL_LATITUDE_E7240
+
+config OVERRIDE_DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
 
 config VGA_BIOS_ID
 	default "8086,0a16"

src/mainboard/dell/haswell_latitude/Makefile.mk

@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += bootblock.c
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
+romstage-y += variants/$(VARIANT_DIR)/romstage.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c

src/mainboard/dell/haswell_latitude/bootblock.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <device/pci_ops.h>
 #include <ec/dell/mec5035/mec5035.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 

src/mainboard/dell/haswell_latitude/devicetree_lp.cb

@@ -10,7 +10,6 @@ chip northbridge/intel/haswell
 
 	device domain 0x0 on
 		ops haswell_pci_domain_ops
-		subsystemid  0x1028 0x05ca inherit
 
 		device pci 00.0 on end # Host bridge
 		device pci 02.0 on # Internal graphics VGA controller
@@ -30,7 +29,7 @@ chip northbridge/intel/haswell
 		end
 		device pci 03.0 on end # Mini-HD audio
 
-		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
+		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point LP PCH
 			register "docking_supported" = "true"
 			register "alt_gp_smi_en" = "0x00002000"
 			register "gpe0_en_1" = "0x00000100"
@@ -53,13 +52,12 @@ chip northbridge/intel/haswell
 			device pci 17.0 off end # SDIO
 			device pci 19.0 on  end # Intel Gigabit Ethernet
 			device pci 1b.0 on  end # High Definition Audio
-			device pci 1c.0 on  end # PCIe Port #1
+			device pci 1c.0 off end # PCIe Port #1
 			device pci 1c.1 off end # PCIe Port #2
 			device pci 1c.2 off end # PCIe Port #3
-			device pci 1c.3 on  end # PCIe Port #4, WLAN
-			device pci 1c.4 on  end # PCIe Port #5, SD/MMC Card Reader
-			# PCIe Port #6 Can be muxed between PCIe and SATA
-			device pci 1c.5 on  end # PCIe Port #6
+			device pci 1c.3 off end # PCIe Port #4
+			device pci 1c.4 off end # PCIe Port #5
+			device pci 1c.5 off end # PCIe Port #6
 			device pci 1d.0 on  end # USB2 EHCI #1
 			device pci 1f.0 on      # LPC bridge
 				register "gen1_dec" = "0x007c0681"
@@ -72,10 +70,7 @@ chip northbridge/intel/haswell
 					device pnp ff.0 on end
                                 end
 			end
-			device pci 1f.2 on # SATA Controller (AHCI)
-				# 0(eSATA on dock), 1(mSATA near the fan), 3(mSATA near WLAN)
-				register "sata_port_map" = "0x0b"
-			end
+			device pci 1f.2 on  end # SATA Controller (AHCI)
 			device pci 1f.3 on  end # SMBus
 			device pci 1f.6 off end # Thermal
 		end

src/mainboard/dell/haswell_latitude/variants/e7240/overridetree.cb

@@ -0,0 +1,21 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/haswell
+	device domain 0 on
+		subsystemid  0x1028 0x05ca inherit
+
+		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
+			device pci 1c.0 on  end # PCIe Port #1
+			device pci 1c.1 off end # PCIe Port #2
+			device pci 1c.2 off end # PCIe Port #3
+			device pci 1c.3 on  end # PCIe Port #4, WLAN
+			device pci 1c.4 on  end # PCIe Port #5, SD/MMC Card Reader
+			# PCIe Port #6 Can be muxed between PCIe and SATA
+			device pci 1c.5 on  end # PCIe Port #6
+			device pci 1f.2 on # SATA Controller (AHCI)
+				# 0(eSATA on dock), 1(mSATA near the fan), 3(mSATA near WLAN)
+				register "sata_port_map" = "0x0b"
+			end
+		end
+	end
+end