From 510686add4d4874afd9abc3d1490ea876597768a Mon Sep 17 00:00:00 2001 From: Sowmya Aralguppe Date: Mon, 21 Jul 2025 19:26:22 +0530 Subject: [PATCH] soc/intel/pantherlake: Rearm crashlog using watcher After crashlog data is extracted, CPU rearm command is issued to prepare the crash logging mechanism for future events. Instead of command and response polling of mailbox, watcher interface which is a direct MMIO based, low latency control register is used for efficiency. In PTL, a Crashlog watcher providing control the same way provided by Crashlog Mailbox Interface used by (mainly) BIOS is used for all CPU crashlog control requests from BIOS to PUNIT. BUG=b: None TEST= Manually trigger crash using command iotools mmio_write32 (baraddress + watcher offset=0x10) 0x20000000 followed by warm boot, check rearm status - which is 25th bit of *(bar_address) Change-Id: I89dd23fad144c1c7122b5536f1ac848ea66ea6b1 Signed-off-by: Sowmya Aralguppe Reviewed-on: https://review.coreboot.org/c/coreboot/+/88515 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/pantherlake/crashlog.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/src/soc/intel/pantherlake/crashlog.c b/src/soc/intel/pantherlake/crashlog.c index da2cbccb32..d02c369286 100644 --- a/src/soc/intel/pantherlake/crashlog.c +++ b/src/soc/intel/pantherlake/crashlog.c @@ -20,6 +20,7 @@ #define CRASHLOG_CONSUMED_BIOS_MASK BIT(27) #define CRASHLOG_SET_CLEAR_TRIGGER_MASK BIT(30) #define CRASHLOG_SET_CONSUMED_MASK BIT(18) +#define CRASHLOG_REARM_TRIGGER_MASK BIT(28) /* Global crashLog info */ static bool m_pmc_crash_log_support; @@ -385,13 +386,6 @@ int cl_get_total_data_size(void) return m_pmc_crash_log_size + m_cpu_crash_log_size; } -static uintptr_t get_control_status_interface(void) -{ - if (disc_tab_addr) - return (disc_tab_addr + CONTROL_INTERFACE_OFFSET * sizeof(u32)); - return 0; -} - int cpu_cl_clear_data(void) { /* Clear all crashlog data and CRASHLOG_SET_CONSUMED = 1 -> sets CONSUMED_BIOS bit */ @@ -417,18 +411,8 @@ static bool wait_and_check(u32 bit_mask) void cpu_cl_rearm(void) { - uintptr_t ctrl_sts_intfc_addr = get_control_status_interface(); - - if (!ctrl_sts_intfc_addr) { - printk(BIOS_ERR, "CPU crashlog control and status interface address not valid\n"); - return; - } - - /* Rearm the CPU crashlog. Crashlog does not get collected if rearming fails */ - cl_punit_control_interface_t punit_ctrl_intfc; - memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t)); - punit_ctrl_intfc.fields.set_re_arm = 1; - write32p(ctrl_sts_intfc_addr, punit_ctrl_intfc.data); + setbits64p(cl_get_cpu_bar_addr() + CRASHLOG_WATCHER_CONTROL_OFFSET, + CRASHLOG_REARM_TRIGGER_MASK); if (!wait_and_check(CRASHLOG_RE_ARM_STATUS_MASK)) printk(BIOS_ERR, "CPU crashlog re_arm not asserted\n");