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UPSTREAM: MMCONF_SUPPORT: Flip default to enabled

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Also remove separate MMCONF_SUPPORT_DEFAULT flag.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17694
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Idf1accdb93843a8fe2ee9c09fb984968652476e0
Reviewed-on: https://chromium-review.googlesource.com/417954
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-11-29 16:46:56 +02:00 • committed by chrome-bot
commit 50f4e327bb
46 changed files with 22 additions and 40 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/northbridge/amd/amdk8/Kconfig
View file

@ -22,6 +22,14 @@ config NORTHBRIDGE_AMD_AMDK8
select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AMDK8
config NO_MMCONF_SUPPORT
bool
default y
help
If you want to remove this, you need to make sure any access to CPU
nodes 0:18.0, 0:19.0, ... continue to use PCI IO config access.
config AGP_APERTURE_SIZE
hex
default 0x4000000

1
src/northbridge/intel/e7505/Kconfig
View file

@ -20,6 +20,7 @@ if NORTHBRIDGE_INTEL_E7505
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT

1
src/northbridge/intel/fsp_rangeley/Kconfig
View file

@ -17,7 +17,6 @@
config NORTHBRIDGE_INTEL_FSP_RANGELEY
bool
select CPU_INTEL_FSP_MODEL_406DX
select MMCONF_SUPPORT_DEFAULT
if NORTHBRIDGE_INTEL_FSP_RANGELEY

2
src/northbridge/intel/fsp_sandybridge/Kconfig
View file

@ -18,13 +18,11 @@ config NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
bool
select CPU_INTEL_FSP_MODEL_206AX
select INTEL_GMA_ACPI
select MMCONF_SUPPORT_DEFAULT
config NORTHBRIDGE_INTEL_FSP_IVYBRIDGE
bool
select CPU_INTEL_FSP_MODEL_306AX
select INTEL_GMA_ACPI
select MMCONF_SUPPORT_DEFAULT
if NORTHBRIDGE_INTEL_FSP_IVYBRIDGE || NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE

1
src/northbridge/intel/gm45/Kconfig
View file

@ -21,7 +21,6 @@ if NORTHBRIDGE_INTEL_GM45
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select HAVE_DEBUG_RAM_SETUP
select MMCONF_SUPPORT_DEFAULT
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI

1
src/northbridge/intel/haswell/Kconfig
View file

@ -16,7 +16,6 @@
config NORTHBRIDGE_INTEL_HASWELL
bool
select CPU_INTEL_HASWELL
select MMCONF_SUPPORT_DEFAULT
select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select INTEL_DDI
select INTEL_DP

1
src/northbridge/intel/i3100/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_INTEL_I3100
bool
select NO_MMCONF_SUPPORT
select LATE_CBMEM_INIT
select UDELAY_IO

1
src/northbridge/intel/i440bx/Kconfig
View file

@ -15,6 +15,7 @@
config NORTHBRIDGE_INTEL_I440BX
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT
select UDELAY_IO

1
src/northbridge/intel/i5000/Kconfig
View file

@ -15,7 +15,6 @@
config NORTHBRIDGE_INTEL_I5000
bool
select MMCONF_SUPPORT_DEFAULT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT

1
src/northbridge/intel/i82810/Kconfig
View file

@ -15,6 +15,7 @@
config NORTHBRIDGE_INTEL_I82810
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT
select UDELAY_IO

1
src/northbridge/intel/i82830/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_INTEL_I82830
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT
select UDELAY_IO

1
src/northbridge/intel/i855/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_INTEL_I855
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT

1
src/northbridge/intel/i945/Kconfig
View file

@ -20,7 +20,6 @@ if NORTHBRIDGE_INTEL_I945
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select MMCONF_SUPPORT_DEFAULT
select HAVE_DEBUG_RAM_SETUP
select LAPIC_MONOTONIC_TIMER
select VGA

1
src/northbridge/intel/nehalem/Kconfig
View file

@ -16,7 +16,6 @@
config NORTHBRIDGE_INTEL_NEHALEM
bool
select CPU_INTEL_MODEL_2065X
select MMCONF_SUPPORT_DEFAULT
select VGA
select INTEL_EDID
select TSC_MONOTONIC_TIMER

1
src/northbridge/intel/pineview/Kconfig
View file

@ -21,7 +21,6 @@ if NORTHBRIDGE_INTEL_PINEVIEW
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select MMCONF_SUPPORT_DEFAULT
select HAVE_DEBUG_RAM_SETUP
select LAPIC_MONOTONIC_TIMER
select LATE_CBMEM_INIT

2
src/northbridge/intel/sandybridge/Kconfig
View file

@ -16,7 +16,6 @@
config NORTHBRIDGE_INTEL_SANDYBRIDGE
bool
select MMCONF_SUPPORT_DEFAULT
select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
@ -25,7 +24,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select MMCONF_SUPPORT_DEFAULT
select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP

1
src/northbridge/intel/x4x/Kconfig
View file

@ -22,7 +22,6 @@ if NORTHBRIDGE_INTEL_X4X
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select HAVE_DEBUG_RAM_SETUP
select MMCONF_SUPPORT_DEFAULT
select VGA
select INTEL_GMA_ACPI
select EARLY_CBMEM_INIT

1
src/northbridge/via/cn700/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_VIA_CN700
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT

1
src/northbridge/via/cx700/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_VIA_CX700
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_HARD_RESET

1
src/northbridge/via/vx800/Kconfig
View file

@ -1,5 +1,6 @@
config NORTHBRIDGE_VIA_VX800
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select LATE_CBMEM_INIT

1
src/northbridge/via/vx900/Kconfig
View file

@ -21,7 +21,6 @@ config NORTHBRIDGE_VIA_VX900
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_HARD_RESET
select MMCONF_SUPPORT_DEFAULT
select LATE_CBMEM_INIT
if NORTHBRIDGE_VIA_VX900