no PIRQ table

Make cmos.layout work with incomprehensible tool -- just turn off checksums.
Add static.c to list of files covered by kscope

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@975 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-10-31 22:43:02 +00:00
commit 4f2df501f9
3 changed files with 5 additions and 6 deletions

View file

@ -288,7 +288,7 @@ endif
kscope: $(obj)/mainboard/$(MAINBOARDDIR)/kscope/cscope.files
kscope $(obj)/mainboard/$(MAINBOARDDIR)/kscope
ALLSRC=$(STAGE0_SRC) $(INITRAM_SRC) $(STAGE2_SRC) $(PCIROM_SRC)
ALLSRC=$(STAGE0_SRC) $(INITRAM_SRC) $(STAGE2_SRC) $(PCIROM_SRC) $(STAGE2_DYNAMIC_SRC)
$(obj)/mainboard/$(MAINBOARDDIR)/kscope/cscope.files: $(ALLSRC)
$(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)/kscope
$(Q)cp cscope.proj $(obj)/mainboard/$(MAINBOARDDIR)/kscope

View file

@ -30,7 +30,6 @@ config BOARD_VIA_EPIA_CN
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237
select SUPERIO_VIA_VT1211
select PIRQ_TABLE
help
VIA EPIA-CN

View file

@ -80,12 +80,12 @@ entries
# coreboot config options: console
392 3 e 5 baud_rate
395 4 e 6 debug_level
#399 1 r 0 unused
399 1 r 0 unused
# coreboot config options: southbridge
408 1 e 1 nmi
409 1 e 1 power_on_after_fail
#410 6 r 0 unused
410 6 r 0 unused
# coreboot config options: bootloader
416 512 s 0 boot_devices
@ -124,8 +124,8 @@ enumerations
6 9 Spew
# -----------------------------------------------------------------
checksums
#checksums
checksum 392 983 984
#checksum 392 983 984