From 4eb524ee9d174e8fe68ceb5d697456d08e555c3b Mon Sep 17 00:00:00 2001
From: "Johann C. Rode" <jcrode@gmx.net>
Date: Fri, 28 Nov 2025 10:19:18 -0800
Subject: [PATCH] spd/ddr4: Add three more parts

This patch adds three more parts that are used in Lenovo Thinkpads:

SKHynix H5AN4G6NAFR-UHC
SKHynix H5ANAG6NAMR-UHC
Micron MT40A512M16LY-075:H

The settings (MT/s, timing, organization, etc.) have been obtained from
schematics and datasheets.

Change-Id: Ie0958a4a845f072daee3379731f558584dca5da6
Signed-off-by: Johann C. Rode <jcrode@gmx.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
---
 spd/ddr4/memory_parts.json                    | 33 +++++++++++++++++++
 .../set-0/parts_spd_manifest.generated.txt    |  3 ++
 spd/ddr4/set-0/spd-16.hex                     | 32 ++++++++++++++++++
 3 files changed, 68 insertions(+)
 create mode 100644 spd/ddr4/set-0/spd-16.hex

diff --git a/spd/ddr4/memory_parts.json b/spd/ddr4/memory_parts.json
index 0d416f89fa..8a863efec0 100644
--- a/spd/ddr4/memory_parts.json
+++ b/spd/ddr4/memory_parts.json
@@ -404,6 +404,39 @@
                 "packageBusWidth": 16,
                 "ranksPerPackage": 1
             }
+        },
+        {
+            "name": "H5AN4G6NAFR-UHC",
+            "attribs": {
+                "speedMTps": 2400,
+                "CL_nRCD_nRP": 17,
+                "capacityPerDieGb": 4,
+                "diesPerPackage": 1,
+                "packageBusWidth": 16,
+                "ranksPerPackage": 1
+            }
+        },
+        {
+            "name": "H5ANAG6NAMR-UHC",
+            "attribs": {
+                "speedMTps": 2400,
+                "CL_nRCD_nRP": 17,
+                "capacityPerDieGb": 4,
+                "diesPerPackage": 2,
+                "packageBusWidth": 16,
+                "ranksPerPackage": 1
+            }
+        },
+        {
+            "name": "MT40A512M16LY-075:H",
+            "attribs": {
+                "speedMTps": 2400,
+                "CL_nRCD_nRP": 17,
+                "capacityPerDieGb": 8,
+                "diesPerPackage": 1,
+                "packageBusWidth": 16,
+                "ranksPerPackage": 1
+            }
         }
     ]
 }
diff --git a/spd/ddr4/set-0/parts_spd_manifest.generated.txt b/spd/ddr4/set-0/parts_spd_manifest.generated.txt
index 440d4c1dab..37b9b53f0c 100644
--- a/spd/ddr4/set-0/parts_spd_manifest.generated.txt
+++ b/spd/ddr4/set-0/parts_spd_manifest.generated.txt
@@ -35,3 +35,6 @@ H5AN8G6NAMR-UHC,spd-13.hex
 MT40A512M16LY-075:E,spd-12.hex
 MT40A256M16GE-083E:B,spd-14.hex
 K4A4G165WE-BCRC,spd-15.hex
+H5AN4G6NAFR-UHC,spd-15.hex
+H5ANAG6NAMR-UHC,spd-16.hex
+MT40A512M16LY-075:H,spd-12.hex
diff --git a/spd/ddr4/set-0/spd-16.hex b/spd/ddr4/set-0/spd-16.hex
new file mode 100644
index 0000000000..937e0cc335
--- /dev/null
+++ b/spd/ddr4/set-0/spd-16.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 84 19 91 08 00 00 00 00 01 03 00 00
+00 00 07 08 F8 0F 00 00 72 72 72 11 00 72 20 08
+00 05 70 03 00 F0 2B 34 28 00 78 00 14 3C 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 9C B5 AC AC AC AC C1 D6 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00