Samus: fix unused GPIO pin

Mark GPIO42 as unused according to Samus schematics

BUG=None
TEST=Make the chnage; Pass the build process; Need someone having
the board perform the verification.

Change-Id: Ifd6a0d2de8af0fe3af4a14f44ce572b41b77509c
Signed-off-by: Kenji Chen <kenji.chen@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/217344
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Kenji Chen 2014-09-10 06:00:15 +08:00 committed by chrome-internal-fetch
commit 4e0f8f3276

View file

@ -68,7 +68,7 @@ static const struct gpio_config mainboard_gpio_config[] = {
PCH_GPIO_UNUSED, /* 39: UNUSED */
PCH_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */
PCH_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */
PCH_GPIO_OUT_HIGH, /* 42: WLAN_DISABLE_L */
PCH_GPIO_UNUSED, /* 42: WLAN_DISABLE_L */
PCH_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */
PCH_GPIO_UNUSED, /* 44: UNUSED */
PCH_GPIO_PIRQ, /* 45: DSP_INT (PIRQN) */