From 4d7b56cdaabd6510abda45edae5f226442903729 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 2 May 2025 10:43:57 -0500 Subject: [PATCH] soc/intel/cmn/cse_lite: Fix handling of soft disable state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When soft-disabled, boards selecting SOC_INTEL_CSE_LITE_SKU boot up with a working state of M3_NO_UMA vs NORMAL, so handle this condition. Without this, when vboot is not used, the board will simply fail to boot as vboot_recovery_mode does not exist: [ERROR] cse_lite: CSE does not meet prerequisites [ERROR] cse_lite: Failed to get CSE boot partition info [DEBUG] cse: CSE status registers: HFSTS1: 0x80032044, HFSTS2: 0x32280126 HFSTS3: 0x50 [EMERG] cse: Failed to trigger recovery mode(recovery subcode:6) This commit addresses the first error (does not meet prerequisites), which allows CSE sync to continue and boot the RW partition in the soft-disabled state. It also allows the CSE to properly transition back into the normal working state (when that option is selected via CMOS or CFR). TEST=build/boot google/wyvern, verify able to disable/enable the ME properly via CFR option. Change-Id: I46da5ac248e267acee958d66ebbd97d945e722b9 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/87517 Reviewed-by: Sean Rhodes Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella --- src/soc/intel/common/block/cse/cse_lite.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 5647a36b32..e4923ca376 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -267,6 +267,7 @@ static void cse_print_boot_partition_info(void) * - When CSE boots from RW partition (COM: Normal and CWS: Normal) * - When CSE boots from RO partition (COM: Soft Temp Disable and CWS: Normal) * - After HMRFPO_ENABLE command is issued to CSE (COM: SECOVER_MEI_MSG and CWS: Normal) + * - When CSE boots from RW partition (COM: Soft Temp Disable and CWS: M3 w/o UMA) * The prerequisite check should be handled in cse_get_bp_info() and * cse_set_next_boot_partition() since the CSE's current operation mode is changed between these * cmd handler calls. @@ -280,6 +281,8 @@ static bool cse_is_bp_cmd_info_possible(void) return true; if (cse_is_hfs1_com_soft_temp_disable()) return true; + } else if (cse_is_hfs1_cws_m3_no_uma() && cse_is_hfs1_com_soft_temp_disable()) { + return true; } return false; }