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mb/google/ocelot/var/ocelot: remove unused gpios

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Remove GPP_D16, GPP_D17, and GPP_B25 as they aren't used in ocelot.

Change GPP_A08 polarity in gpio_table and rom_gpio_table.

BUG=b:412736286
BRANCH=None
TEST=`emerge-ocelot coreboot` and verify it compiles without error.

Change-Id: Ife444cef816ca2b69db466661c63935f72836554
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Avi Uday <aviuday@google.com>
This commit is contained in:
Nick Vaccaro 2025-05-19 13:58:34 -07:00 • committed by Matt DeVillier
commit 4d5b32f7f7
2 changed files with 2 additions and 17 deletions
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15
src/mainboard/google/ocelot/variants/ocelot/fw_config.c
View file

@ -20,10 +20,6 @@ static const struct pad_config hda_enable_pads[] = {
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
/* HDA_SDI_0 */
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
/* HDA_RST_B */
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF1),
/* HDA_SDI_1 */
PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
/* DMIC_CLK */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF5),
@ -86,11 +82,6 @@ static const struct pad_config sndw_alc721_enable_pads[] = {
PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3),
/* SNDW1_DATA */
PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3),
/* DMIC_CLK */
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF3),
/* DMIC_DATA */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF3),
};
static const struct pad_config audio_disable_pads[] = {
@ -107,8 +98,6 @@ static const struct pad_config audio_disable_pads[] = {
PAD_NC(GPP_D11, NONE),
PAD_NC(GPP_D12, NONE),
PAD_NC(GPP_D13, NONE),
PAD_NC(GPP_D16, NONE),
PAD_NC(GPP_D17, NONE),
};
static const struct pad_config x1slot_pads[] = {
@ -116,8 +105,6 @@ static const struct pad_config x1slot_pads[] = {
PAD_CFG_GPO(GPP_A08, 1, PLTRST),
/* GPP_D19: X1_DT_PCIE_RST_N */
PAD_CFG_GPO(GPP_D19, 1, PLTRST),
/* GPP_B25: X1_SLOT_WAKE_N */
PAD_CFG_GPI_SCI_LOW(GPP_B25, NONE, DEEP, LEVEL),
};
static const struct pad_config x1slot_disable_pads[] = {
@ -125,8 +112,6 @@ static const struct pad_config x1slot_disable_pads[] = {
PAD_CFG_GPO(GPP_A08, 0, PLTRST),
/* GPP_D19: X1_DT_PCIE_RST_N */
PAD_NC(GPP_D19, NONE),
/* GPP_B25: X1_SLOT_WAKE_N */
PAD_NC(GPP_B25, NONE)
};
/*

4
src/mainboard/google/ocelot/variants/ocelot/gpio.c
View file

@ -22,7 +22,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_A06: ESPI_SOC_RST_L # */
PAD_CFG_NF(GPP_A06, NONE, DEEP, NF1),
/* GPP_A08: SSD_PERST_L # */
PAD_CFG_GPO(GPP_A08, 0, PLTRST),
PAD_CFG_GPO(GPP_A08, 1, PLTRST),
/* GPP_A09: WWAN_EN */
PAD_CFG_GPO(GPP_A09, 0, PLTRST),
/* GPP_A10: WWAN_RF_DISABLE_ODL */
@ -382,7 +382,7 @@ static const struct pad_config early_gpio_table[] = {
/* Pad configuration in romstage */
static const struct pad_config romstage_gpio_table[] = {
/* GPP_A08: SSD_PERST_L */
PAD_CFG_GPO(GPP_A08, 1, PLTRST),
PAD_CFG_GPO(GPP_A08, 0, PLTRST),
};
const struct pad_config *variant_gpio_table(size_t *num)