erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

mb/emulation/qemu-sbsa: Configure flash region for MMU

Browse source 
Since QEMU commit 728b923f548d
("target/arm: Do memory type alignment check when translation enabled")
alignment is checked for device memory. That causes exceptions during
bootup of coreboot trying to load things (e.g. stages) from the memory
mapped flash.

To fix it the memory mapped flash region will be marked as MA_MEM
(normal memory) instead of MA_DEV (device memory). Technically that
isn't 100% correct, but avoids having to write a custom memory mapped
flash driver that checks for alignment on all accesses. Since it is
emulation and therefore always normal memory anyway, there shouldn't be
any side effects.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I98bd1a18495e3d153ce53abec8686c7871ee12c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85147
Reviewed-by: David Milosevic <David.Milosevic@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Maximilian Brune 2024-11-15 03:54:33 +01:00 • committed by Lean Sheng Tan
commit 4d4776f320
1 changed files with 3 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/mainboard/emulation/qemu-sbsa/bootblock.c
View file

@ -4,6 +4,7 @@
#include <bootblock_common.h>
#include <symbols.h>
DECLARE_REGION(flash);
void bootblock_mainboard_init(void)
{
mmu_init();
@ -13,6 +14,8 @@ void bootblock_mainboard_init(void)
/* Set a dummy value for DRAM. ramstage should update the mapping. */
mmu_config_range(_dram, ((size_t) CONFIG_DRAM_SIZE_MB) * MiB, MA_MEM | MA_RW);
mmu_config_range(_flash, REGION_SIZE(flash), MA_MEM | MA_RO | MA_MEM_NC);
mmu_config_range(_ttb, REGION_SIZE(ttb), MA_MEM | MA_S | MA_RW);
mmu_config_range(_bootblock, REGION_SIZE(bootblock), MA_MEM | MA_S | MA_RW);
mmu_config_range(_ramstage, REGION_SIZE(ramstage), MA_MEM | MA_S | MA_RW);