diff --git a/src/soc/mediatek/mt8189/Kconfig b/src/soc/mediatek/mt8189/Kconfig
index d0395c29cd..512ae54d9e 100644
--- a/src/soc/mediatek/mt8189/Kconfig
+++ b/src/soc/mediatek/mt8189/Kconfig
@@ -9,6 +9,7 @@ config SOC_MEDIATEK_MT8189
 	select ARCH_RAMSTAGE_ARMV8_64
 	select HAVE_UART_SPECIAL
 	select SOC_MEDIATEK_COMMON
+	select FLASH_DUAL_IO_READ
 	select ARM64_USE_ARCH_TIMER
 
 if SOC_MEDIATEK_MT8189
diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk
index a121413cc1..00489c02a4 100644
--- a/src/soc/mediatek/mt8189/Makefile.mk
+++ b/src/soc/mediatek/mt8189/Makefile.mk
@@ -2,6 +2,7 @@
 
 ifeq ($(CONFIG_SOC_MEDIATEK_MT8189),y)
 
+all-y += ../common/flash_controller.c
 all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
 all-$(CONFIG_SPI_FLASH) += spi.c
 all-y += ../common/timer_prepare.c timer.c
diff --git a/src/soc/mediatek/mt8189/include/soc/spi.h b/src/soc/mediatek/mt8189/include/soc/spi.h
index 8c66e4a882..01e866bbd7 100644
--- a/src/soc/mediatek/mt8189/include/soc/spi.h
+++ b/src/soc/mediatek/mt8189/include/soc/spi.h
@@ -8,6 +8,7 @@
 #ifndef __SOC_MEDIATEK_MT8189_INCLUDE_SOC_SPI_H__
 #define __SOC_MEDIATEK_MT8189_INCLUDE_SOC_SPI_H__
 
-#include <spi-generic.h>
+/* Initialize SPI NOR Flash Controller */
+void mtk_snfc_init(void);
 
-#endif /* __SOC_MEDIATEK_MT8189_INCLUDE_SOC_SPI_H__ */
+#endif
diff --git a/src/soc/mediatek/mt8189/spi.c b/src/soc/mediatek/mt8189/spi.c
index da40fc57a5..410b53eb8a 100644
--- a/src/soc/mediatek/mt8189/spi.c
+++ b/src/soc/mediatek/mt8189/spi.c
@@ -5,17 +5,34 @@
  * Chapter number: 9.17
  */
 
-#include <device/mmio.h>
-#include <soc/addressmap.h>
+#include <gpio.h>
+#include <soc/flash_controller_common.h>
 #include <soc/spi.h>
+#include <spi_flash.h>
+
+static const struct pad_func nor_pinmux[4] = {
+	PAD_FUNC(SPINOR_CK, SPINOR_CK, GPIO_PULL_DOWN),
+	PAD_FUNC(SPINOR_CS, SPINOR_CS, GPIO_PULL_UP),
+	PAD_FUNC(SPINOR_IO0, SPINOR_IO0, GPIO_PULL_DOWN),
+	PAD_FUNC(SPINOR_IO1, SPINOR_IO1, GPIO_PULL_DOWN),
+};
+
+void mtk_snfc_init(void)
+{
+	for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++)
+		mtk_snfc_init_pad_func(&nor_pinmux[i], GPIO_DRV_8_MA);
+}
 
 static const struct spi_ctrlr spi_flash_ctrlr = {
 	.max_xfer_size = 65535,
+	.flash_probe = mtk_spi_flash_probe,
 };
 
 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
 	{
 		.ctrlr = &spi_flash_ctrlr,
+		.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+		.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
 	},
 };