diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index 6bcbabc890..2af574c088 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -87,6 +87,7 @@ enum timestamp_id {
 	TS_TPM_ENABLE_UPDATE_END = 554,
 	TS_ESOL_START = 555,
 	TS_ESOL_END = 556,
+	TS_FIRMWARE_SPLASH_RENDERED = 557,
 
 	/* 900-940 reserved for vendorcode extensions (900-940: AMD) */
 	TS_AGESA_INIT_RESET_START = 900,
@@ -273,6 +274,7 @@ static const struct timestamp_id_to_name {
 	TS_NAME_DEF(TS_TPM_ENABLE_UPDATE_END, 0, "finished TPM enable update"),
 	TS_NAME_DEF(TS_ESOL_START, 0, "started early sign-off life (eSOL) notification"),
 	TS_NAME_DEF(TS_ESOL_END, 0, "finished early sign-off life (eSOL) notification"),
+	TS_NAME_DEF(TS_FIRMWARE_SPLASH_RENDERED, 0, "finished rendering splash screen"),
 
 	/* AMD related timestamps */
 	TS_NAME_DEF(TS_AGESA_INIT_RESET_START, TS_AGESA_INIT_RESET_END, "calling AmdInitReset"),
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 76636dd7a8..f6ed00be4d 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -157,16 +157,16 @@ static void do_silicon_init(struct fsp_header *hdr)
 	fsp_debug_after_silicon_init(status);
 	fsps_return_value_handler(FSP_SILICON_INIT_API, status);
 
-	/*
-	 * Only applies for SoC platforms prior to FSP 2.2 specification:
-	 * If a BMP logo is enabled (`BMP_LOGO`) and the platform is
-	 * configured to skip the FSP for rendering logo bitmap
-	 * (`USE_COREBOOT_FOR_BMP_RENDERING`), then call the coreboot
-	 * native function to handle BMP logo loading and display.
-	 */
-	if (!CONFIG(PLATFORM_USES_FSP2_2) && CONFIG(BMP_LOGO) &&
-			 CONFIG(USE_COREBOOT_FOR_BMP_RENDERING))
-		soc_load_logo_by_coreboot();
+	/* Only applies for SoC platforms prior to FSP 2.2 specification. */
+	if (!CONFIG(PLATFORM_USES_FSP2_2) && CONFIG(BMP_LOGO)) {
+		if (CONFIG(USE_COREBOOT_FOR_BMP_RENDERING))
+			soc_load_logo_by_coreboot();
+		/*
+		 * This applies regardless of whether FSP or coreboot handled
+		 * the rendering.
+		 */
+		timestamp_add_now(TS_FIRMWARE_SPLASH_RENDERED);
+	}
 
 	/* Reinitialize CPUs if FSP-S has done MP Init */
 	if (CONFIG(USE_INTEL_FSP_MP_INIT) && !fsp_is_multi_phase_init_enabled())
@@ -216,14 +216,21 @@ static void do_silicon_init(struct fsp_header *hdr)
 	timestamp_add_now(TS_FSP_MULTI_PHASE_SI_INIT_END);
 	post_code(POSTCODE_FSP_MULTI_PHASE_SI_INIT_EXIT);
 
-	/*
-	 * If a BMP logo is enabled (`BMP_LOGO`) and the platform is
-	 * configured to skip the FSP for rendering logo bitmap
-	 * (`USE_COREBOOT_FOR_BMP_RENDERING`), then call the coreboot
-	 * native function to handle BMP logo loading and display.
-	 */
-	if (CONFIG(BMP_LOGO) && CONFIG(USE_COREBOOT_FOR_BMP_RENDERING))
-		soc_load_logo_by_coreboot();
+	if (CONFIG(BMP_LOGO)) {
+		/*
+		 * If a BMP logo is enabled (`BMP_LOGO`) and the platform is
+		 * configured to skip the FSP for rendering logo bitmap
+		 * (`USE_COREBOOT_FOR_BMP_RENDERING`), then call the coreboot
+		 * native function to handle BMP logo loading and display.
+		 */
+		if (CONFIG(USE_COREBOOT_FOR_BMP_RENDERING))
+			soc_load_logo_by_coreboot();
+		/*
+		 * This applies regardless of whether FSP or coreboot handled
+		 * the rendering.
+		 */
+		timestamp_add_now(TS_FIRMWARE_SPLASH_RENDERED);
+	}
 
 	/* Reinitialize CPUs if FSP-S has done MP Init */
 	if (CONFIG(USE_INTEL_FSP_MP_INIT))