From 4c394dfbce762574fc79edcb6e4ac6bf346e48a3 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 19 Oct 2013 01:39:57 -0700 Subject: [PATCH] nyan: Implement the code which reads GPIOs for ChromeOS. This file isn't used yet, but it will be turned on when the CONFIG_CHROMEOS kconfig option is enabled. BUG=None TEST=With this and other changes, built and booted into depthcharge and saw that it could find GPIO related information in the coreboot tables. BRANCH=None Change-Id: I92fa7f3c2602e3946ddeb8e6cdf3a09b7bfcf58a Signed-off-by: Gabe Black Reviewed-on: https://chromium-review.googlesource.com/173791 Reviewed-by: Gabe Black Tested-by: Gabe Black Commit-Queue: Gabe Black --- src/mainboard/google/nyan/chromeos.c | 103 +++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 src/mainboard/google/nyan/chromeos.c diff --git a/src/mainboard/google/nyan/chromeos.c b/src/mainboard/google/nyan/chromeos.c new file mode 100644 index 0000000000..75c99ba44a --- /dev/null +++ b/src/mainboard/google/nyan/chromeos.c @@ -0,0 +1,103 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include + +enum { + ACTIVE_LOW = 0, + ACTIVE_HIGH = 1 +}; + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + int count = 0; + + /* Write Protect: active low */ + gpios->gpios[count].port = GPIO_R1_INDEX; + gpios->gpios[count].polarity = ACTIVE_LOW; + gpios->gpios[count].value = gpio_get_in_value(GPIO_R1_INDEX); + strncpy((char *)gpios->gpios[count].name, "write protect", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Recovery: active high */ + gpios->gpios[count].port = -1; + gpios->gpios[count].polarity = ACTIVE_HIGH; + gpios->gpios[count].value = get_recovery_mode_switch(); + strncpy((char *)gpios->gpios[count].name, "recovery", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Lid: active high */ + gpios->gpios[count].port = GPIO_R4_INDEX; + gpios->gpios[count].polarity = ACTIVE_HIGH; + gpios->gpios[count].value = gpio_get_in_value(GPIO_R4_INDEX); + strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); + count++; + + /* Power: active low */ + gpios->gpios[count].port = GPIO_Q0_INDEX; + gpios->gpios[count].polarity = ACTIVE_LOW; + gpios->gpios[count].value = gpio_get_in_value(GPIO_Q0_INDEX); + strncpy((char *)gpios->gpios[count].name, "power", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Developer: virtual GPIO active high */ + gpios->gpios[count].port = -1; + gpios->gpios[count].polarity = ACTIVE_HIGH; + gpios->gpios[count].value = get_developer_mode_switch(); + strncpy((char *)gpios->gpios[count].name, "developer", + GPIO_MAX_NAME_LENGTH); + count++; + + gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio)); + gpios->count = count; + + printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size); +} + +int get_developer_mode_switch(void) +{ + return gpio_get_in_value(GPIO_Q6_INDEX); +} + +int get_recovery_mode_switch(void) +{ + uint32_t ec_events; + + /* The GPIO is active low. */ + if (!gpio_get_in_value(GPIO_Q7_INDEX)) // RECMODE_GPIO + return 1; + + ec_events = google_chromeec_get_events_b(); + return !!(ec_events & + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); +} + +int get_write_protect_state(void) +{ + return !gpio_get_in_value(GPIO_R1_INDEX); +}