mb/google/nissa/var/meliks: Copy pirrha’s overridetree as initial one
Upload the initial devicetree for meliks. All devices and port usages are the same as pirrha, just copied from pirrha's devicetree for the initial configuration except typec_aux_bias_pads[0] since pirrha had incorrect setting. About detection method of the touch screen device, the panel-built-in touch screen for meliks needs some delay after panel power up, so it may not be detected in coreboot phase. So we would keep `probed` instead of `detect` for this special touch screen device to avoid missing it in OS. BUG=b:394359785 BRANCH=nissa TEST=FW_NAME=meliks emerge-nissa coreboot Change-Id: Ifd6dfbeca7276dbacd72f9145ed7119566c8faef Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86377 Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Seunghwan Kim
Matt DeVillier
parent
a53d8ad8ac
commit
4ba6dc6b1c
1 changed files with 508 additions and 2 deletions
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@ -1,6 +1,512 @@
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chip soc/intel/alderlake
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# GPE configuration
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register "pmc_gpe0_dw1" = "GPP_C"
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device domain 0 on
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end
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# Enable MIPI DSI on DDI port A
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register "ddi_portA_config" = "2" # MIPI DSI
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register "sagv" = "SaGv_Enabled"
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# SOC Aux orientation override:
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# This is a bitfield that corresponds to up to 4 TCSS ports.
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# Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
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# TcssAuxOri = 0101b
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# Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
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# Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
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# motherboard to USBC connector
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register "tcss_aux_ori" = "5"
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register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_A14, .pad_auxn_dc = GPP_A15}"
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register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
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register "usb2_ports[0]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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.type_c = 1,
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}" # USB2_C0
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register "usb2_ports[1]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_11P25MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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.type_c = 1,
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}" # USB2_C1
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register "usb2_ports[3]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_11P25MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # USB2_A0
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register "usb2_ports[4]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_DE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # uSD
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register "usb2_ports[5]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # UFCamera
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A1
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoPci,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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# Configure external V1P05/Vnn/VnnSx Rails
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register "ext_fivr_settings" = "{
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.configure_ext_fivr = 1,
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.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
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.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX ,
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.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX ,
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.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
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.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_RETENTION,
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.v1p05_voltage_mv = 1050,
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.vnn_voltage_mv = 780,
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.vnn_sx_voltage_mv = 1050,
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.v1p05_icc_max_ma = 500,
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.vnn_icc_max_ma = 500,
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}"
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# VR Settings
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register "domain_vr_config[VR_DOMAIN_IA]" = "{
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.vr_config_enable = 1,
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.tdc_timewindow = 1000,
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.ac_loadline = 500,
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.dc_loadline = 500,
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.psi1threshold = VR_CFG_AMP(20),
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.psi2threshold = VR_CFG_AMP(5),
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.psi3threshold = VR_CFG_AMP(1),
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}"
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register "domain_vr_config[VR_DOMAIN_GT]" = "{
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.vr_config_enable = 1,
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.tdc_timewindow = 1000,
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.psi1threshold = VR_CFG_AMP(13),
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.psi2threshold = VR_CFG_AMP(5),
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.psi3threshold = VR_CFG_AMP(1),
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}"
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# Enable the Cnvi BT Audio Offload
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register "cnvi_bt_audio_offload" = "1"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C0 | TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| I2C1 | Touchscreen |
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#| I2C2 | WCAM |
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#| I2C3 | Audio |
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#| I2C4 | EMR |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.panel_orientation = LB_FB_ORIENTATION_RIGHT_UP,
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.i2c[0] = {
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.early_init = 1,
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.speed = I2C_SPEED_FAST_PLUS,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST_PLUS,
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.scl_lcnt = 55,
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.scl_hcnt = 30,
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.sda_hold = 7,
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}
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 157,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[2] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 157,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 158,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 158,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 158,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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}"
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device domain 0 on
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""Memory""
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register "options.tsr[1].desc" = ""Charger""
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register "options.tsr[2].desc" = ""Ambient""
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register "options.tsr[3].desc" = ""Sub Charger""
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# TODO: below values are initial reference values only
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
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[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
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[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 3000,
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.max_power = 6000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200
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},
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.pl2 = {
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.min_power = 25000,
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.max_power = 25000,
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.time_window_min = 1,
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.time_window_max = 1,
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.granularity = 1000
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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device generic 0 on end
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end
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end
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device ref ipu on
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chip drivers/intel/mipi_camera
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register "acpi_uid" = "0x50000"
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register "acpi_name" = ""IPU0""
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register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
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register "cio2_num_ports" = "1"
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register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
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register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
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register "cio2_prt[0]" = "2"
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device generic 0 on end
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end
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end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "enable_cnvi_ddr_rfim" = "true"
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device generic 0 on end
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end
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end
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device ref i2c1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""HX121A""
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register "generic.desc" = ""HX Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
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register "generic.reset_delay_ms" = "200"
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register "generic.reset_off_delay_ms" = "2"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x1"
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device i2c 4F on end
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end
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end
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device ref i2c2 on
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chip drivers/intel/mipi_camera
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register "acpi_hid" = ""OVTI8856""
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register "acpi_uid" = "0"
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register "acpi_name" = ""CAM0""
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register "chip_name" = ""Ov 8856 Camera""
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register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
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register "ssdb.lanes_used" = "4"
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register "ssdb.link_used" = "1"
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register "ssdb.vcm_type" = "0x0C"
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register "vcm_name" = ""VCM0""
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register "num_freq_entries" = "2"
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register "link_freq[0]" = "360000000"
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register "link_freq[1]" = "180000000"
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register "remote_name" = ""IPU0""
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register "has_power_resource" = "true"
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#Controls
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register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
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register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
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register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
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register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
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register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
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#_ON
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register "on_seq.ops_cnt" = "5"
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register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
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register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
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register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
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register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
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register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
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#_OFF
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register "off_seq.ops_cnt" = "4"
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register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
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register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
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register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
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register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
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device i2c 36 on end
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end
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chip drivers/intel/mipi_camera
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register "acpi_uid" = "3"
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register "acpi_name" = ""VCM0""
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register "chip_name" = ""DW AF DAC""
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register "device_type" = "INTEL_ACPI_CAMERA_VCM"
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register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC""
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register "vcm_compat" = ""dongwoon,dw9714""
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device i2c 0C on end
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end
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chip drivers/intel/mipi_camera
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register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
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register "acpi_uid" = "1"
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register "acpi_name" = ""NVM0""
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register "chip_name" = ""GT24C08""
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register "device_type" = "INTEL_ACPI_CAMERA_NVM"
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register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC""
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register "nvm_size" = "0x2000"
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register "nvm_pagesize" = "1"
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register "nvm_readonly" = "1"
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register "nvm_width" = "0x10"
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register "nvm_compat" = ""atmel,24c08""
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device i2c 50 on end
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end
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end
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device ref i2c3 on
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chip drivers/i2c/da7219
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "200"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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device i2c 1a on end
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end
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end
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device ref i2c4 on
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chip drivers/i2c/hid
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register "generic.hid" = ""WCOM014B""
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register "generic.desc" = ""WCOM Digitizer""
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register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_F12)"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
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register "generic.enable_delay_ms" = "20"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F16)"
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register "generic.reset_delay_ms" = "100"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x1"
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device i2c 09 on end
|
||||
end
|
||||
end
|
||||
device ref i2c5 on
|
||||
chip drivers/i2c/hid
|
||||
register "generic.hid" = ""ZNT0000""
|
||||
register "generic.desc" = ""Zinitix Touchpad""
|
||||
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
|
||||
register "generic.wake" = "GPE0_DW2_14"
|
||||
register "generic.detect" = "1"
|
||||
register "hid_desc_reg_offset" = "0xE"
|
||||
device i2c 40 on end
|
||||
end
|
||||
end
|
||||
device ref hda on
|
||||
chip drivers/generic/max98357a
|
||||
register "hid" = ""MX98360A""
|
||||
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
|
||||
register "sdmode_delay" = "5"
|
||||
device generic 0 on end
|
||||
end
|
||||
chip drivers/sof
|
||||
register "spkr_tplg" = "max98360a"
|
||||
register "jack_tplg" = "da7219"
|
||||
register "mic_tplg" = "_2ch_pdm0"
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
device ref pcie_rp7 off end
|
||||
device ref pcie_rp9 off end
|
||||
device ref ish on
|
||||
chip drivers/intel/ish
|
||||
register "add_acpi_dma_property" = "true"
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
device ref ufs on end
|
||||
device ref pch_espi on
|
||||
chip ec/google/chromeec
|
||||
use conn0 as mux_conn[0]
|
||||
use conn1 as mux_conn[1]
|
||||
device pnp 0c09.0 on end
|
||||
end
|
||||
end
|
||||
device ref pmc hidden
|
||||
chip drivers/intel/pmc_mux
|
||||
device generic 0 on
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port1 as usb2_port
|
||||
use tcss_usb3_port1 as usb3_port
|
||||
device generic 0 alias conn0 on end
|
||||
end
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port2 as usb2_port
|
||||
use tcss_usb3_port2 as usb3_port
|
||||
device generic 1 alias conn1 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
device ref tcss_xhci on
|
||||
chip drivers/usb/acpi
|
||||
device ref tcss_root_hub on
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-C Port C0 (MLB)""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
|
||||
device ref tcss_usb3_port1 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-C Port C1 (DB)""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
|
||||
device ref tcss_usb3_port2 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
device ref xhci on
|
||||
chip drivers/usb/acpi
|
||||
device ref xhci_root_hub on
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-C Port C0 (MLB)""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
|
||||
device ref usb2_port1 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-C Port C1 (DB)""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
|
||||
device ref usb2_port2 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-A Port A1 (DB)""
|
||||
register "type" = "UPC_TYPE_A"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
|
||||
device ref usb2_port4 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 SDCard""
|
||||
register "type" = "UPC_TYPE_EXPRESSCARD"
|
||||
device ref usb2_port5 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Camera""
|
||||
register "type" = "UPC_TYPE_INTERNAL"
|
||||
device ref usb2_port6 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Bluetooth""
|
||||
register "type" = "UPC_TYPE_INTERNAL"
|
||||
register "reset_gpio" =
|
||||
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
|
||||
device ref usb2_port10 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-A Port A1 (DB)""
|
||||
register "type" = "UPC_TYPE_USB3_A"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
|
||||
device ref usb3_port2 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue