From 4b73479c3821ae14d7811c4b5870042d8b238d00 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Thu, 26 Feb 2026 10:21:09 -0800 Subject: [PATCH] soc/intel/common/feature/smihandler: Add common PCH client SMI handler Add a common implementation of SMI handler code for PCH client platforms to reduce code duplication across Alder Lake, Meteor Lake, Panther Lake, and Tiger Lake platforms. This implementation consolidates: - smihandler_soc_disable_busmaster(): Skip disabling PMC bus master - southbridge_smi array: Standard SMI handler mappings The common driver uses a platform-specific macro that must be defined in each platform's soc/pci_devs.h header: - SOC_PMC_DEV: PMC PCI device identifier This change enables consolidation of nearly identical smihandler.c files across four platforms, reducing duplication by approximately 100+ lines. Change-Id: I9ecb65b7ea4feafb8acbaf5798bbeaeb80b7c24a Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/91293 Reviewed-by: Huang, Cliff Tested-by: build bot (Jenkins) --- .../intel/common/feature/smihandler/Kconfig | 9 ++++++ .../common/feature/smihandler/Makefile.mk | 3 ++ .../common/feature/smihandler/smihandler.c | 29 +++++++++++++++++++ 3 files changed, 41 insertions(+) create mode 100644 src/soc/intel/common/feature/smihandler/Kconfig create mode 100644 src/soc/intel/common/feature/smihandler/Makefile.mk create mode 100644 src/soc/intel/common/feature/smihandler/smihandler.c diff --git a/src/soc/intel/common/feature/smihandler/Kconfig b/src/soc/intel/common/feature/smihandler/Kconfig new file mode 100644 index 0000000000..a927e1828e --- /dev/null +++ b/src/soc/intel/common/feature/smihandler/Kconfig @@ -0,0 +1,9 @@ +## SPDX-License-Identifier: GPL-2.0-only + +config SOC_INTEL_COMMON_FEATURE_SMIHANDLER + bool + help + Select this if the platform supports common PCH client SMI handler + implementation. This consolidates SMI handler code for PCH client + platforms including PMC bus master control and standard SMI handler + mappings. The platform must define SOC_PMC_DEV in soc/pci_devs.h. diff --git a/src/soc/intel/common/feature/smihandler/Makefile.mk b/src/soc/intel/common/feature/smihandler/Makefile.mk new file mode 100644 index 0000000000..cda860ed0b --- /dev/null +++ b/src/soc/intel/common/feature/smihandler/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only + +smm-$(CONFIG_SOC_INTEL_COMMON_FEATURE_SMIHANDLER) += smihandler.c diff --git a/src/soc/intel/common/feature/smihandler/smihandler.c b/src/soc/intel/common/feature/smihandler/smihandler.c new file mode 100644 index 0000000000..35726049d0 --- /dev/null +++ b/src/soc/intel/common/feature/smihandler/smihandler.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +int smihandler_soc_disable_busmaster(pci_devfn_t dev) +{ + /* Skip disabling PMC bus master to keep IO decode enabled */ + if (dev == SOC_PMC_DEV) + return 0; + return 1; +} + +const smi_handler_t southbridge_smi[SMI_STS_BITS] = { + [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, + [APM_STS_BIT] = smihandler_southbridge_apmc, + [PM1_STS_BIT] = smihandler_southbridge_pm1, + [GPE0_STS_BIT] = smihandler_southbridge_gpe0, + [GPIO_STS_BIT] = smihandler_southbridge_gpi, + [ESPI_SMI_STS_BIT] = smihandler_southbridge_espi, + [MCSMI_STS_BIT] = smihandler_southbridge_mc, +#if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE) + [TCO_STS_BIT] = smihandler_southbridge_tco, +#endif + [PERIODIC_STS_BIT] = smihandler_southbridge_periodic, + [MONITOR_STS_BIT] = smihandler_southbridge_monitor, +};