From 4b1ad5fc61420e07dd64352a768f99a18123ba14 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Tue, 28 Jan 2025 15:57:18 +0100 Subject: [PATCH] tree: Use true, false for DspEnable DspEnable is a boolean, so use true false instead of 0 1. Change-Id: I5bab9db3632848f92732160bb821dda8cdb14281 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/86189 Reviewed-by: Sean Rhodes Reviewed-by: Maxim Polyakov Tested-by: build bot (Jenkins) --- src/mainboard/51nb/x210/devicetree.cb | 2 +- src/mainboard/acer/aspire_vn7_572g/devicetree.cb | 2 +- src/mainboard/google/eve/devicetree.cb | 2 +- src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/glados/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nami/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/rammus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/soraka/devicetree.cb | 2 +- src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | 2 +- src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb | 2 +- src/mainboard/intel/kunimitsu/devicetree.cb | 2 +- src/mainboard/intel/saddlebrook/devicetree.cb | 2 +- src/mainboard/libretrend/lt1000/devicetree.cb | 2 +- src/mainboard/protectli/vault_kbl/devicetree.cb | 2 +- src/mainboard/purism/librem_skl/devicetree.cb | 2 +- src/mainboard/razer/blade_stealth_kbl/devicetree.cb | 2 +- 20 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index d0084e7a97..a5bb944cb3 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/skylake register "dptf_enable" = "false" # FSP Configuration - register "DspEnable" = "0" + register "DspEnable" = "false" register "IoBufferOwnership" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/acer/aspire_vn7_572g/devicetree.cb b/src/mainboard/acer/aspire_vn7_572g/devicetree.cb index e3abec88b2..60136ed84a 100644 --- a/src/mainboard/acer/aspire_vn7_572g/devicetree.cb +++ b/src/mainboard/acer/aspire_vn7_572g/devicetree.cb @@ -315,7 +315,7 @@ chip soc/intel/skylake register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S" # 17:16 in pmbase+0018h end device ref hda on - register "DspEnable" = "1" + register "DspEnable" = "true" # PchHdaDspEndpointDmic is only to be returned to reference code # DXE phase as HOB, used to select blob for NHLT end diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 0189e62cf0..5ff43927a5 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/skylake register "gpe0_dw2" = "GPP_E" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 145b0935c3..d2bb08e830 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -59,7 +59,7 @@ chip soc/intel/skylake register "s0ix_enable" = true # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 1de2833245..bac1ed3cc0 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -31,7 +31,7 @@ chip soc/intel/skylake register "dptf_enable" = "true" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 159acb3cb6..d1a3542dc3 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "CmdTriStateDis" = "1" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 8fa6a1494d..160dfd333e 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -25,7 +25,7 @@ chip soc/intel/skylake register "s0ix_enable" = true # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 3a5806b8ef..e32e5e4557 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -34,7 +34,7 @@ chip soc/intel/skylake register "s0ix_enable" = true # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index c0c9861d72..dfb11ee48c 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -34,7 +34,7 @@ chip soc/intel/skylake register "s0ix_enable" = true # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 39b4e747cb..e64d408eb2 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/skylake register "CmdTriStateDis" = "1" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 5cc1be7f4f..3251916ffc 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "CmdTriStateDis" = "1" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index de3b2ab727..7602bcb6bf 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -34,7 +34,7 @@ chip soc/intel/skylake register "s0ix_enable" = true # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index cd17307eba..5da43c2098 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -1,7 +1,7 @@ chip soc/intel/skylake # FSP Configuration - register "DspEnable" = "0" + register "DspEnable" = "false" register "ScsEmmcHs400Enabled" = "0" register "SerialIoDevMode" = "{ diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 7dae3295a8..1880cd9fa9 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -4,7 +4,7 @@ chip soc/intel/skylake register "gpe0_dw0" = "GPP_C" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 08eb965985..758b913c98 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -17,7 +17,7 @@ chip soc/intel/skylake register "dptf_enable" = "true" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 2aae0d017a..fd2ae4108b 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -15,7 +15,7 @@ chip soc/intel/skylake register "gpe0_dw2" = "GPP_E" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "3" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 771ea06630..29d82de222 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -27,7 +27,7 @@ chip soc/intel/skylake register "dptf_enable" = "false" # FSP Configuration - register "DspEnable" = "1" + register "DspEnable" = "true" register "IoBufferOwnership" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index af7fd5bd4a..30152b5462 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -20,7 +20,7 @@ chip soc/intel/skylake register "tcc_offset" = "5" # TCC of 95C # FSP Configuration - register "DspEnable" = "0" + register "DspEnable" = "false" register "IoBufferOwnership" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index 0b912c6efc..9af8046762 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -38,7 +38,7 @@ chip soc/intel/skylake register "dptf_enable" = "false" # FSP Configuration - register "DspEnable" = "0" + register "DspEnable" = "false" register "IoBufferOwnership" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 05c619a519..637427adb5 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -19,7 +19,7 @@ chip soc/intel/skylake register "dptf_enable" = "false" # FSP Configuration - register "DspEnable" = "0" + register "DspEnable" = "false" register "IoBufferOwnership" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled"