From 4aeaa453e32d97e8a732de75192be8f6c3e84ea8 Mon Sep 17 00:00:00 2001 From: Hualin Wei Date: Thu, 13 Feb 2025 19:37:56 +0800 Subject: [PATCH] mb/google/nissa/var/pujjoniru: Update DTT settings for thermal control update DTT settings for thermal control, according to b:395802079#comment2. BUG=b:395802079 TEST=emerge-nissa coreboot Change-Id: Ia32911488464af4e5070543e2ec630c339ab1925 Signed-off-by: Hualin Wei Reviewed-on: https://review.coreboot.org/c/coreboot/+/86404 Reviewed-by: Qinghong Zeng Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- .../brya/variants/pujjoniru/overridetree.cb | 154 +++++++++++------- 1 file changed, 96 insertions(+), 58 deletions(-) diff --git a/src/mainboard/google/brya/variants/pujjoniru/overridetree.cb b/src/mainboard/google/brya/variants/pujjoniru/overridetree.cb index 11098ac4ed..60d3117d05 100644 --- a/src/mainboard/google/brya/variants/pujjoniru/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjoniru/overridetree.cb @@ -101,35 +101,79 @@ chip soc/intel/alderlake .tdp_pl4 = 78, }" + register "power_limits_config[ADL_N_081_15W_CORE]" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 25, + .tdp_pl4 = 114, + }" + device domain 0 on device ref dtt on chip drivers/intel/dptf ## sensor information - register "options.tsr[0].desc" = ""CPU_VR"" + register "options.tsr[0].desc" = ""5V"" register "options.tsr[1].desc" = ""CPU"" - register "options.tsr[2].desc" = ""Ambient"" + register "options.tsr[2].desc" = ""AMB"" register "options.tsr[3].desc" = ""Charger"" # TODO: below values are initial reference values only + ## Active Policy + register "policies.active" = "{ + [0] = { + .target = DPTF_TEMP_SENSOR_0, + .thresholds = { + TEMP_PCT(80, 90), + TEMP_PCT(75, 80), + TEMP_PCT(70, 70), + TEMP_PCT(60, 50), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_1, + .thresholds = { + TEMP_PCT(51, 69), + TEMP_PCT(48, 57), + TEMP_PCT(44, 50), + TEMP_PCT(42, 45), + TEMP_PCT(40, 39), + } + }, + [2] = { + .target = DPTF_TEMP_SENSOR_2, + .thresholds = { + TEMP_PCT(75, 90), + TEMP_PCT(70, 80), + TEMP_PCT(65, 70), + TEMP_PCT(55, 50), + } + }, + [3] = { + .target = DPTF_TEMP_SENSOR_3, + .thresholds = { + TEMP_PCT(90, 90), + TEMP_PCT(85, 80), + TEMP_PCT(75, 70), + TEMP_PCT(70, 50), + } + } + }" + ## Passive Policy register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000), - [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 5000), - [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 4000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 80, 5000), }" ## Critical Policy register "policies.critical" = "{ - [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_3, 95, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { .min_power = 6000, - .max_power = 6000, + .max_power = 9000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200 @@ -145,9 +189,9 @@ chip soc/intel/alderlake ## Charger Performance Control (Control, mA) register "controls.charger_perf" = "{ - [0] = { 255, 3000 }, - [1] = { 24, 1500 }, - [2] = { 16, 1000 }, + [0] = { 255, 4200 }, + [1] = { 48, 3000 }, + [2] = { 32, 2000 }, [3] = { 8, 500 } }" @@ -175,9 +219,9 @@ chip soc/intel/alderlake chip drivers/intel/dptf ## sensor information - register "options.tsr[0].desc" = ""CPU_VR"" + register "options.tsr[0].desc" = ""5V"" register "options.tsr[1].desc" = ""CPU"" - register "options.tsr[2].desc" = ""Ambient"" + register "options.tsr[2].desc" = ""AMB"" register "options.tsr[3].desc" = ""Charger"" # TODO: below values are initial reference values only @@ -186,70 +230,64 @@ chip soc/intel/alderlake [0] = { .target = DPTF_TEMP_SENSOR_0, .thresholds = { - TEMP_PCT(85, 90), - TEMP_PCT(54, 64), - TEMP_PCT(52, 52), - TEMP_PCT(50, 44), - TEMP_PCT(48, 38), - TEMP_PCT(45, 34), + TEMP_PCT(80, 90), + TEMP_PCT(75, 80), + TEMP_PCT(70, 70), + TEMP_PCT(65, 50), } }, [1] = { .target = DPTF_TEMP_SENSOR_1, .thresholds = { - TEMP_PCT(75, 90), - TEMP_PCT(70, 80), - TEMP_PCT(65, 70), - TEMP_PCT(60, 60), - TEMP_PCT(55, 50), - TEMP_PCT(50, 40), + TEMP_PCT(51, 69), + TEMP_PCT(48, 57), + TEMP_PCT(44, 50), + TEMP_PCT(42, 45), + TEMP_PCT(40, 39), } }, [2] = { .target = DPTF_TEMP_SENSOR_2, + .thresholds = { + TEMP_PCT(75, 90), + TEMP_PCT(70, 80), + TEMP_PCT(65, 70), + TEMP_PCT(55, 50), + } + }, + [3] = { + .target = DPTF_TEMP_SENSOR_3, .thresholds = { TEMP_PCT(90, 90), TEMP_PCT(85, 80), TEMP_PCT(75, 70), TEMP_PCT(70, 50), } - }, - [3] = { - .target = DPTF_TEMP_SENSOR_3, - .thresholds = { - TEMP_PCT(80, 90), - TEMP_PCT(75, 80), - TEMP_PCT(70, 70), - TEMP_PCT(65, 50), - } } }" ## Passive Policy register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000), - [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 6000), - [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 80, 5000), }" ## Critical Policy register "policies.critical" = "{ - [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN), + [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_3, 95, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { - .min_power = 15000, + .min_power = 12000, .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200 }, .pl2 = { - .min_power = 35000, - .max_power = 35000, + .min_power = 25000, + .max_power = 25000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000 @@ -258,23 +296,23 @@ chip soc/intel/alderlake ## Charger Performance Control (Control, mA) register "controls.charger_perf" = "{ - [0] = { 255, 3000 }, - [1] = { 24, 2000 }, - [2] = { 16, 1000 }, + [0] = { 255, 4200 }, + [1] = { 48, 3000 }, + [2] = { 32, 2000 }, [3] = { 8, 500 } }" ## Fan Performance Control (Percent, Speed, Noise, Power) register "controls.fan_perf" = "{ - [0] = { 100, 4000, 220, 1640, }, - [1] = { 90, 3700, 220, 1640, }, - [2] = { 80, 3500, 180, 1310, }, - [3] = { 70, 3300, 145, 1030, }, - [4] = { 60, 3100, 115, 765, }, - [5] = { 50, 2800, 90, 545, }, - [6] = { 40, 2500, 55, 365, }, - [7] = { 30, 2100, 30, 220, }, - [8] = { 20, 1500, 15, 120, }, + [0] = { 90, 4734, 220, 1640, }, + [1] = { 80, 4443, 180, 1310, }, + [2] = { 70, 4108, 145, 1030, }, + [3] = { 60, 3752, 115, 765, }, + [4] = { 50, 3352, 90, 545, }, + [5] = { 40, 2897, 55, 365, }, + [6] = { 30, 2363, 30, 220, }, + [7] = { 20, 1752, 15, 120, }, + [8] = { 10, 918, 10, 60, }, [9] = { 0, 0, 0, 50, } }"