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soc/intel/ptl: Add GPIO ACPI support for Wildcat Lake SoC

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Key changes:
 - Relocate the package corresponding to CPUJTAG group from GPI3
   device to the GPI4 device in the ACPI table, utilizing a Kconfig
   guard for conditional compilation.
 - Add ACPI IDs specific to Wildcat Lake GPIO communities.
 - Select SOC_INTEL_PANTHERLAKE_BASE for SOC_INTEL_WILDCATLAKE to
   clearly differentiate between Panther Lake and Wildcat Lake
   changes.

References:
- Wildcat Lake EDS Volume 2 (#829345)
- Wildcat Lake GPIO Implementation Summary (#836031)

BUG=b:394208231
TEST=Both Ocelot and Fatcat variants are built

Change-Id: I934c193c75e459c72cc8b01a575cc0bbd65dc273
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87474
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Appukuttan V K 2025-04-28 17:39:43 +05:30 • committed by Matt DeVillier
commit 4a89d1b77d
3 changed files with 79 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/soc/intel/pantherlake/Kconfig
View file

@ -127,7 +127,7 @@ config SOC_INTEL_PANTHERLAKE_H
config SOC_INTEL_WILDCATLAKE
bool
select SOC_INTEL_PANTHERLAKE_U_H
select SOC_INTEL_PANTHERLAKE_BASE
help
Choose this option if the mainboard is built using WCL system-on-a-chip (SoC).

69
src/soc/intel/pantherlake/acpi/gpio.asl
View file

@ -506,6 +506,28 @@ Device (GPI3)
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
#if CONFIG(SOC_INTEL_WILDCATLAKE)
Package (0x03)
{
Package (0x02)
{
"intc-gpio-group-0-subproperties",
GPPH
},
Package (0x02)
{
"intc-gpio-group-1-subproperties",
GPPA
},
Package (0x02)
{
"intc-gpio-group-2-subproperties",
VGP3
}
}
#else
Package (0x04)
{
Package (0x02)
@ -532,7 +554,9 @@ Device (GPI3)
VGP3
}
}
#endif
})
#if (CONFIG(SOC_INTEL_PANTHERLAKE_U_H) || CONFIG(SOC_INTEL_PANTHERLAKE_H))
/* first bank/group in community 3: RSVD */
Name (RSVD, Package (0x02)
{
@ -558,6 +582,7 @@ Device (GPI3)
}
}
})
#endif
/* 2nd bank/group in community 3: GPP_H */
Name (GPPH, Package (0x02)
{
@ -710,6 +735,22 @@ Device (GPI4)
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
#if CONFIG(SOC_INTEL_WILDCATLAKE)
Package (0x02)
{
Package (0x02)
{
"intc-gpio-group-0-subproperties",
GPPS
},
Package (0x02)
{
"intc-gpio-group-1-subproperties",
RSVD
}
}
#else
Package (0x01)
{
Package (0x02)
@ -718,6 +759,7 @@ Device (GPI4)
GPPS
}
}
#endif
})
/* only bank/group in community 4: GPP_S */
Name (GPPS, Package (0x02)
@ -744,6 +786,33 @@ Device (GPI4)
}
}
})
#if CONFIG(SOC_INTEL_WILDCATLAKE)
/* second bank/group in community 4: RSVD */
Name (RSVD, Package (0x02)
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package (0x03)
{
Package (0x02)
{
"intc-gpio-group-name",
"RSVD"
},
Package (0x02)
{
"intc-gpio-pad-count",
NUM_GRP_RSVD_PADS
},
Package (0x02)
{
"intc-gpio-group-offset",
GPP_RSVD_START_OFFSET
}
}
})
#endif
Method (_STA, 0, NotSerialized)
{
Return (0xF)

9
src/soc/intel/pantherlake/include/soc/gpio.h
View file

@ -6,12 +6,21 @@
#include <soc/gpio_defs.h>
#include <intelblocks/gpio.h>
#if CONFIG(SOC_INTEL_WILDCATLAKE)
#define CROS_GPIO_NAME "INTC10EC"
#define CROS_GPIO_DEVICE0_NAME "INTC10EC:00"
#define CROS_GPIO_DEVICE1_NAME "INTC10EC:01"
#define CROS_GPIO_DEVICE2_NAME "INTC10EC:02"
#define CROS_GPIO_DEVICE3_NAME "INTC10EC:03"
#define CROS_GPIO_DEVICE4_NAME "INTC10EC:04"
#else
#define CROS_GPIO_NAME "INTC10BC"
#define CROS_GPIO_DEVICE0_NAME "INTC10BC:00"
#define CROS_GPIO_DEVICE1_NAME "INTC10BC:01"
#define CROS_GPIO_DEVICE2_NAME "INTC10BC:02"
#define CROS_GPIO_DEVICE3_NAME "INTC10BC:03"
#define CROS_GPIO_DEVICE4_NAME "INTC10BC:04"
#endif
#define ACPI_GPIO_CID "INTC105F"
#define ACPI_GPIO_HID CROS_GPIO_NAME