erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

tree: Remove Ice Lake PCI ID remnants

Browse source 
Commit ad6e3c847f ("tree: Drop Intel Ice Lake support") removed most
of the Ice Lake PCI IDs, but missed the ones with the ICP prefix
(Ice Point? Ice Lake Point?). Remove all PCI_DID_INTEL_ICP* defines
and references in common block drivers.

Change-Id: I9d33c69d174130aa781a00441fca367e0a67bcb4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90904
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Matt DeVillier 2026-01-25 15:38:47 -06:00
commit 4a71e5fe66
11 changed files with 0 additions and 69 deletions
Download patch file Download diff file Expand all files Collapse all files

35
src/include/device/pci_ids.h
View file

@ -3525,23 +3525,6 @@
#define PCI_DID_INTEL_CNL_LP_PCIE_RP15 0x9db6
#define PCI_DID_INTEL_CNL_LP_PCIE_RP16 0x9db7
#define PCI_DID_INTEL_ICP_LP_PCIE_RP1 0x34b8
#define PCI_DID_INTEL_ICP_LP_PCIE_RP2 0x34b9
#define PCI_DID_INTEL_ICP_LP_PCIE_RP3 0x34ba
#define PCI_DID_INTEL_ICP_LP_PCIE_RP4 0x34bb
#define PCI_DID_INTEL_ICP_LP_PCIE_RP5 0x34bc
#define PCI_DID_INTEL_ICP_LP_PCIE_RP6 0x34bd
#define PCI_DID_INTEL_ICP_LP_PCIE_RP7 0x34be
#define PCI_DID_INTEL_ICP_LP_PCIE_RP8 0x34bf
#define PCI_DID_INTEL_ICP_LP_PCIE_RP9 0x34b0
#define PCI_DID_INTEL_ICP_LP_PCIE_RP10 0x34b1
#define PCI_DID_INTEL_ICP_LP_PCIE_RP11 0x34b2
#define PCI_DID_INTEL_ICP_LP_PCIE_RP12 0x34b3
#define PCI_DID_INTEL_ICP_LP_PCIE_RP13 0x34b4
#define PCI_DID_INTEL_ICP_LP_PCIE_RP14 0x34b5
#define PCI_DID_INTEL_ICP_LP_PCIE_RP15 0x34b6
#define PCI_DID_INTEL_ICP_LP_PCIE_RP16 0x34b7
#define PCI_DID_INTEL_TGP_LP_PCIE_RP1 0xa0b8
#define PCI_DID_INTEL_TGP_LP_PCIE_RP2 0xa0b9
#define PCI_DID_INTEL_TGP_LP_PCIE_RP3 0xa0ba
@ -3930,7 +3913,6 @@
#define PCI_DID_INTEL_CNP_H_SATA 0xa352
#define PCI_DID_INTEL_CNP_H_HALO_SATA 0xa353
#define PCI_DID_INTEL_CNP_LP_SATA 0x9dd3
#define PCI_DID_INTEL_ICP_U_SATA 0x34d3
#define PCI_DID_INTEL_CMP_SATA 0x02d5
#define PCI_DID_INTEL_CMP_PREMIUM_SATA 0x02d7
#define PCI_DID_INTEL_CMP_LP_SATA 0x02d3
@ -3980,7 +3962,6 @@
#define PCI_DID_INTEL_GLK_PMC 0x3194
#define PCI_DID_INTEL_CNL_PMC 0x9da1
#define PCI_DID_INTEL_CNP_H_PMC 0xa321
#define PCI_DID_INTEL_ICP_PMC 0x34a1
#define PCI_DID_INTEL_CMP_PMC 0x02a1
#define PCI_DID_INTEL_CMP_H_PMC 0x06a1
#define PCI_DID_INTEL_TGP_PMC 0xa0a1
@ -4043,12 +4024,6 @@
#define PCI_DID_INTEL_CNP_H_I2C1 0xa369
#define PCI_DID_INTEL_CNP_H_I2C2 0xa36a
#define PCI_DID_INTEL_CNP_H_I2C3 0xa36b
#define PCI_DID_INTEL_ICP_I2C0 0x34e8
#define PCI_DID_INTEL_ICP_I2C1 0x34e9
#define PCI_DID_INTEL_ICP_I2C2 0x34ea
#define PCI_DID_INTEL_ICP_I2C3 0x34eb
#define PCI_DID_INTEL_ICP_I2C4 0x34c5
#define PCI_DID_INTEL_ICP_I2C5 0x34c6
#define PCI_DID_INTEL_CMP_I2C0 0x02e8
#define PCI_DID_INTEL_CMP_I2C1 0x02e9
#define PCI_DID_INTEL_CMP_I2C2 0x02ea
@ -4201,9 +4176,6 @@
#define PCI_DID_INTEL_CNP_H_UART0 0xa328
#define PCI_DID_INTEL_CNP_H_UART1 0xa329
#define PCI_DID_INTEL_CNP_H_UART2 0xa347
#define PCI_DID_INTEL_ICP_UART0 0x34a8
#define PCI_DID_INTEL_ICP_UART1 0x34a9
#define PCI_DID_INTEL_ICP_UART2 0x34c7
#define PCI_DID_INTEL_CMP_UART0 0x02a8
#define PCI_DID_INTEL_CMP_UART1 0x02a9
#define PCI_DID_INTEL_CMP_UART2 0x02c7
@ -4306,10 +4278,6 @@
#define PCI_DID_INTEL_CNP_H_SPI1 0xa32b
#define PCI_DID_INTEL_CNP_H_SPI2 0xa37b
#define PCI_DID_INTEL_CNP_H_HWSEQ_SPI 0xa324
#define PCI_DID_INTEL_ICP_SPI0 0x34aa
#define PCI_DID_INTEL_ICP_SPI1 0x34ab
#define PCI_DID_INTEL_ICP_SPI2 0x34fb
#define PCI_DID_INTEL_ICP_HWSEQ_SPI 0x34a4
#define PCI_DID_INTEL_CMP_SPI0 0x02aa
#define PCI_DID_INTEL_CMP_SPI1 0x02ab
#define PCI_DID_INTEL_CMP_SPI2 0x02fb
@ -4781,7 +4749,6 @@
#define PCI_DID_INTEL_LWB_SMBUS_SUPER 0xa223
#define PCI_DID_INTEL_CNL_SMBUS 0x9da3
#define PCI_DID_INTEL_CNP_H_SMBUS 0xa323
#define PCI_DID_INTEL_ICP_LP_SMBUS 0x34a3
#define PCI_DID_INTEL_CMP_SMBUS 0x02a3
#define PCI_DID_INTEL_CMP_H_SMBUS 0x06a3
#define PCI_DID_INTEL_TGP_LP_SMBUS 0xa0a3
@ -4822,7 +4789,6 @@
#define PCI_DID_INTEL_UPT_H_XHCI 0xa2af
#define PCI_DID_INTEL_CNL_LP_XHCI 0x9ded
#define PCI_DID_INTEL_CNP_H_XHCI 0xa36d
#define PCI_DID_INTEL_ICP_LP_XHCI 0x34ed
#define PCI_DID_INTEL_CMP_LP_XHCI 0x02ed
#define PCI_DID_INTEL_CMP_H_XHCI 0x06ed
#define PCI_DID_INTEL_TGP_LP_XHCI 0xa0ed
@ -5086,7 +5052,6 @@
#define PCI_DID_INTEL_SPT_LP_XDCI 0x9d30
#define PCI_DID_INTEL_CNL_LP_XDCI 0x9dee
#define PCI_DID_INTEL_CNP_H_XDCI 0xa36e
#define PCI_DID_INTEL_ICP_LP_XDCI 0x34ee
#define PCI_DID_INTEL_CMP_LP_XDCI 0x02ee
#define PCI_DID_INTEL_CMP_H_XDCI 0x06ee
#define PCI_DID_INTEL_TGP_LP_XDCI 0xa0ee

1
src/soc/intel/common/block/fast_spi/fast_spi.c
View file

@ -572,7 +572,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CMP_H_HWSEQ_SPI,
PCI_DID_INTEL_CNL_HWSEQ_SPI,
PCI_DID_INTEL_CNP_H_HWSEQ_SPI,
PCI_DID_INTEL_ICP_HWSEQ_SPI,
PCI_DID_INTEL_JSP_HWSEQ_SPI,
PCI_DID_INTEL_LWB_SPI,
PCI_DID_INTEL_LWB_SPI_SUPER,

6
src/soc/intel/common/block/i2c/i2c.c
View file

@ -248,12 +248,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CNP_H_I2C1,
PCI_DID_INTEL_CNP_H_I2C2,
PCI_DID_INTEL_CNP_H_I2C3,
PCI_DID_INTEL_ICP_I2C0,
PCI_DID_INTEL_ICP_I2C1,
PCI_DID_INTEL_ICP_I2C2,
PCI_DID_INTEL_ICP_I2C3,
PCI_DID_INTEL_ICP_I2C4,
PCI_DID_INTEL_ICP_I2C5,
PCI_DID_INTEL_CMP_I2C0,
PCI_DID_INTEL_CMP_I2C1,
PCI_DID_INTEL_CMP_I2C2,

16
src/soc/intel/common/block/pcie/pcie.c
View file

@ -249,22 +249,6 @@ static const unsigned short pcie_device_ids[] = {
PCI_DID_INTEL_CNP_H_PCIE_RP22,
PCI_DID_INTEL_CNP_H_PCIE_RP23,
PCI_DID_INTEL_CNP_H_PCIE_RP24,
PCI_DID_INTEL_ICP_LP_PCIE_RP1,
PCI_DID_INTEL_ICP_LP_PCIE_RP2,
PCI_DID_INTEL_ICP_LP_PCIE_RP3,
PCI_DID_INTEL_ICP_LP_PCIE_RP4,
PCI_DID_INTEL_ICP_LP_PCIE_RP5,
PCI_DID_INTEL_ICP_LP_PCIE_RP6,
PCI_DID_INTEL_ICP_LP_PCIE_RP7,
PCI_DID_INTEL_ICP_LP_PCIE_RP8,
PCI_DID_INTEL_ICP_LP_PCIE_RP9,
PCI_DID_INTEL_ICP_LP_PCIE_RP10,
PCI_DID_INTEL_ICP_LP_PCIE_RP11,
PCI_DID_INTEL_ICP_LP_PCIE_RP12,
PCI_DID_INTEL_ICP_LP_PCIE_RP13,
PCI_DID_INTEL_ICP_LP_PCIE_RP14,
PCI_DID_INTEL_ICP_LP_PCIE_RP15,
PCI_DID_INTEL_ICP_LP_PCIE_RP16,
PCI_DID_INTEL_CMP_LP_PCIE_RP1,
PCI_DID_INTEL_CMP_LP_PCIE_RP2,
PCI_DID_INTEL_CMP_LP_PCIE_RP3,

1
src/soc/intel/common/block/pmc/pmc.c
View file

@ -129,7 +129,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_APL_PMC,
PCI_DID_INTEL_GLK_PMC,
PCI_DID_INTEL_CNP_H_PMC,
PCI_DID_INTEL_ICP_PMC,
PCI_DID_INTEL_CMP_PMC,
PCI_DID_INTEL_CMP_H_PMC,
PCI_DID_INTEL_TGP_PMC,

1
src/soc/intel/common/block/sata/sata.c
View file

@ -60,7 +60,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CNP_H_SATA,
PCI_DID_INTEL_CNP_H_HALO_SATA,
PCI_DID_INTEL_CNP_LP_SATA,
PCI_DID_INTEL_ICP_U_SATA,
PCI_DID_INTEL_CMP_SATA,
PCI_DID_INTEL_CMP_PREMIUM_SATA,
PCI_DID_INTEL_CMP_LP_SATA,

1
src/soc/intel/common/block/smbus/smbus.c
View file

@ -66,7 +66,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_EBG_SMBUS,
PCI_DID_INTEL_LWB_SMBUS_SUPER,
PCI_DID_INTEL_LWB_SMBUS,
PCI_DID_INTEL_ICP_LP_SMBUS,
PCI_DID_INTEL_CMP_SMBUS,
PCI_DID_INTEL_CMP_H_SMBUS,
PCI_DID_INTEL_TGP_LP_SMBUS,

3
src/soc/intel/common/block/spi/spi.c
View file

@ -164,9 +164,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CNP_H_SPI0,
PCI_DID_INTEL_CNP_H_SPI1,
PCI_DID_INTEL_CNP_H_SPI2,
PCI_DID_INTEL_ICP_SPI0,
PCI_DID_INTEL_ICP_SPI1,
PCI_DID_INTEL_ICP_SPI2,
PCI_DID_INTEL_CMP_SPI0,
PCI_DID_INTEL_CMP_SPI1,
PCI_DID_INTEL_CMP_SPI2,

3
src/soc/intel/common/block/uart/uart.c
View file

@ -402,9 +402,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CNP_H_UART0,
PCI_DID_INTEL_CNP_H_UART1,
PCI_DID_INTEL_CNP_H_UART2,
PCI_DID_INTEL_ICP_UART0,
PCI_DID_INTEL_ICP_UART1,
PCI_DID_INTEL_ICP_UART2,
PCI_DID_INTEL_CMP_UART0,
PCI_DID_INTEL_CMP_UART1,
PCI_DID_INTEL_CMP_UART2,

1
src/soc/intel/common/block/xdci/xdci.c
View file

@ -39,7 +39,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_CNL_LP_XDCI,
PCI_DID_INTEL_GLK_XDCI,
PCI_DID_INTEL_CNP_H_XDCI,
PCI_DID_INTEL_ICP_LP_XDCI,
PCI_DID_INTEL_CMP_LP_XDCI,
PCI_DID_INTEL_CMP_H_XDCI,
PCI_DID_INTEL_TGP_LP_XDCI,

1
src/soc/intel/common/block/xhci/xhci.c
View file

@ -145,7 +145,6 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LWB_XHCI,
PCI_DID_INTEL_LWB_XHCI_SUPER,
PCI_DID_INTEL_CNP_H_XHCI,
PCI_DID_INTEL_ICP_LP_XHCI,
PCI_DID_INTEL_CMP_LP_XHCI,
PCI_DID_INTEL_CMP_H_XHCI,
PCI_DID_INTEL_TGP_LP_XHCI,