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kbuild: Fix Makefile syntax error

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Whitespace problems _can_ be harmful.  Oh how we all love "make".

Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@35 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Segher Boessenkool 2006-11-07 12:46:21 +00:00
commit 49f093a107
1 changed files with 1 additions and 1 deletions
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src/scripts/Makefile.build
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@ -97,7 +97,7 @@ cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
define rule_cc_o_c
$(call echo-cmd,checksrc) $(cmd_checksrc) \
$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ \
$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
rm -f $(depfile); \
mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd