From 495b705137b2efe9cb5c304d0471b836aa296c98 Mon Sep 17 00:00:00 2001 From: Shuo Liu Date: Tue, 22 Oct 2024 04:08:11 +0800 Subject: [PATCH] configs/builder: Update PBP path for Gen6 Xeon-SP boards Gen6 Xeon-SP boards needs to be provided with platform boot policy blob. Change-Id: I22b944ab6bcb2b9d0797833c06410bdc523e2709 Signed-off-by: Shuo Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/84820 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan --- Documentation/soc/intel/xeon_sp/community_preview_guide.md | 1 + configs/builder/config.intel.crb.avc | 2 ++ configs/builder/config.intel.crb.bnc | 2 ++ 3 files changed, 5 insertions(+) diff --git a/Documentation/soc/intel/xeon_sp/community_preview_guide.md b/Documentation/soc/intel/xeon_sp/community_preview_guide.md index 6a32b4fd8b..96ff86fc09 100644 --- a/Documentation/soc/intel/xeon_sp/community_preview_guide.md +++ b/Documentation/soc/intel/xeon_sp/community_preview_guide.md @@ -140,6 +140,7 @@ https://review.coreboot.org/admin/repos/intel-dev-pub,branches # https://cdrdv2-public.intel.com/736809/736809_FSP_EAS_v2.4_Errata_A.pdf CONFIG_IFD_BIN_PATH= +CONFIG_PBP_BIN_PATH= CONFIG_CPU_UCODE_BINARIES= CONFIG_FSP_T_FILE= CONFIG_FSP_M_FILE= diff --git a/configs/builder/config.intel.crb.avc b/configs/builder/config.intel.crb.avc index eadcaf2cd8..e547c4148f 100644 --- a/configs/builder/config.intel.crb.avc +++ b/configs/builder/config.intel.crb.avc @@ -13,6 +13,7 @@ CONFIG_CONFIGURABLE_RAMSTAGE=y CONFIG_NO_GFX_INIT=y CONFIG_HAVE_IFD_BIN=y +CONFIG_HAVE_PBP_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y CONFIG_ADD_FSP_BINARIES=y @@ -25,6 +26,7 @@ CONFIG_CONSOLE_SERIAL_115200=y # [RW] IFWI Ingredients # CONFIG_IFD_BIN_PATH="site-local/avenuecity/descriptor.bin" +CONFIG_PBP_BIN_PATH="site-local/avenuecity/pbp.bin" CONFIG_CPU_UCODE_BINARIES="site-local/avenuecity/ucode.mcb" CONFIG_FSP_T_FILE="site-local/avenuecity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/avenuecity/Server_M.fd" diff --git a/configs/builder/config.intel.crb.bnc b/configs/builder/config.intel.crb.bnc index 843940c2e7..a4ffaf7f29 100644 --- a/configs/builder/config.intel.crb.bnc +++ b/configs/builder/config.intel.crb.bnc @@ -13,6 +13,7 @@ CONFIG_CONFIGURABLE_RAMSTAGE=y CONFIG_NO_GFX_INIT=y CONFIG_HAVE_IFD_BIN=y +CONFIG_HAVE_PBP_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y CONFIG_ADD_FSP_BINARIES=y @@ -25,6 +26,7 @@ CONFIG_CONSOLE_SERIAL_115200=y # [RW] IFWI Ingredients # CONFIG_IFD_BIN_PATH="site-local/beechnutcity/descriptor.bin" +CONFIG_PBP_BIN_PATH="site-local/beechnutcity/pbp.bin" CONFIG_CPU_UCODE_BINARIES="site-local/beechnutcity/ucode.mcb" CONFIG_FSP_T_FILE="site-local/beechnutcity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/beechnutcity/Server_M.fd"