diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index 6c98fe00f4..7fb83c6921 100644
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -54,7 +54,7 @@ void main(void)
 	if (IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)) {
 		timestamp_add_now(TS_START_COPYVER);
 		if (IS_ENABLED(CONFIG_RETURN_FROM_VERSTAGE))
-			vboot2_verify_firmware();	/* doesn't return */
+			entry = vboot2_verify_firmware();
 		else
 			entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
 						CONFIG_CBFS_PREFIX "/verstage");
diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c
index 80324232a8..2d7a9530b6 100644
--- a/src/soc/nvidia/tegra124/verstage.c
+++ b/src/soc/nvidia/tegra124/verstage.c
@@ -19,6 +19,8 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
+#include <arch/hlt.h>
+#include <arch/stages.h>
 #include <console/console.h>
 #include <soc/cache.h>
 #include <soc/early_configs.h>
@@ -47,12 +49,23 @@ static void soc_init(void)
 	enable_cache();
 }
 
+static void verstage(void)
+{
+	void *entry;
+
+	soc_init();
+	early_mainboard_init();
+
+	entry = vboot2_verify_firmware();
+	if (entry != (void *)-1)
+		stage_exit(entry);
+}
+
 void main(void)
 {
 	asm volatile ("bl arm_init_caches"
 		      : : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
 
-	soc_init();
-	early_mainboard_init();
-	vboot2_verify_firmware();
+	verstage();
+	hlt();
 }
diff --git a/src/soc/nvidia/tegra132/verstage.c b/src/soc/nvidia/tegra132/verstage.c
index 8825ba1fa1..2f036696a9 100644
--- a/src/soc/nvidia/tegra132/verstage.c
+++ b/src/soc/nvidia/tegra132/verstage.c
@@ -19,6 +19,8 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
+#include <arch/hlt.h>
+#include <arch/stages.h>
 #include <console/console.h>
 #include <soc/verstage.h>
 #include <timestamp.h>
@@ -29,13 +31,22 @@ void __attribute__((weak)) verstage_mainboard_init(void)
 	/* Default empty implementation. */
 }
 
-void main(void)
+static void verstage(void)
 {
+	void *entry;
+
 	console_init();
 	timestamp_add_now(TS_START_VBOOT);
 	exception_init();
-
 	verstage_mainboard_init();
 
-	vboot2_verify_firmware();
+	entry = vboot2_verify_firmware();
+	if (entry != (void *)-1)
+		stage_exit(entry);
+}
+
+void main(void)
+{
+	verstage();
+	hlt();
 }
diff --git a/src/vendorcode/google/chromeos/vboot2/misc.h b/src/vendorcode/google/chromeos/vboot2/misc.h
index cae302bc1f..a22c0a6ca5 100644
--- a/src/vendorcode/google/chromeos/vboot2/misc.h
+++ b/src/vendorcode/google/chromeos/vboot2/misc.h
@@ -22,7 +22,7 @@
 
 #include "../vboot_common.h"
 
-void vboot2_verify_firmware(void);
+void *vboot2_verify_firmware(void);
 void *vboot2_load_ramstage(void);
 void verstage_main(void);
 void *vboot_load_stage(int stage_index,
diff --git a/src/vendorcode/google/chromeos/vboot2/verstub.c b/src/vendorcode/google/chromeos/vboot2/verstub.c
index 1b6a14edf1..015b6c11eb 100644
--- a/src/vendorcode/google/chromeos/vboot2/verstub.c
+++ b/src/vendorcode/google/chromeos/vboot2/verstub.c
@@ -53,7 +53,7 @@ static struct vb2_working_data *init_vb2_working_data(void)
  * 2) We're already in the verstage. Verify firmware, then load the romstage and
  * exits to it.
  */
-void vboot2_verify_firmware(void)
+void *vboot2_verify_firmware(void)
 {
 	void *entry;
 	struct vb2_working_data *wd;
@@ -67,7 +67,6 @@ void vboot2_verify_firmware(void)
 		if (entry == (void *)-1)
 			die("failed to load verstage");
 
-		timestamp_add_now(TS_END_COPYVER);
 		/* verify and select a slot */
 		stage_exit(entry);
 	} else {
@@ -76,7 +75,7 @@ void vboot2_verify_firmware(void)
 
 	/* jump to the selected slot */
 	timestamp_add_now(TS_START_COPYROM);
-	entry = NULL;
+	entry = (void *)-1;
 	if (vboot_is_slot_selected(wd)) {
 		/* RW A or B */
 		struct vboot_region fw_main;
@@ -94,8 +93,5 @@ void vboot2_verify_firmware(void)
 	}
 	timestamp_add_now(TS_END_COPYROM);
 
-	if (entry != NULL && entry != (void *)-1)
-		stage_exit(entry);
-
-	die("failed to exit from stage\n");
+	return entry;
 }