diff --git a/src/soc/mediatek/mt8183/memlayout.ld b/src/soc/mediatek/mt8183/memlayout.ld
index b1b9027798..5697519b93 100644
--- a/src/soc/mediatek/mt8183/memlayout.ld
+++ b/src/soc/mediatek/mt8183/memlayout.ld
@@ -26,8 +26,8 @@ SECTIONS
 
 	DRAM_START(0x40000000)
 	DRAM_DMA(0x40000000, 1M)
-	POSTRAM_CBFS_CACHE(0x40100000, 1M)
-	RAMSTAGE(0x40200000, 2M)
+	POSTRAM_CBFS_CACHE(0x40100000, 8M)
+	RAMSTAGE(0x40900000, 2M)
 
 	BL31(0x54600000, 0x60000)
 }
diff --git a/src/soc/mediatek/mt8186/include/soc/memlayout.ld b/src/soc/mediatek/mt8186/include/soc/memlayout.ld
index a47e7c5ae4..da020dd5c0 100644
--- a/src/soc/mediatek/mt8186/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8186/include/soc/memlayout.ld
@@ -44,8 +44,8 @@ SECTIONS
 
 	DRAM_START(0x40000000)
 	DRAM_DMA(0x40000000, 1M)
-	POSTRAM_CBFS_CACHE(0x40100000, 2M)
-	RAMSTAGE(0x40300000, 2M)
+	POSTRAM_CBFS_CACHE(0x40100000, 8M)
+	RAMSTAGE(0x40900000, 2M)
 
 	BL31(0x54600000, 0x60000)
 }
diff --git a/src/soc/mediatek/mt8192/include/soc/memlayout.ld b/src/soc/mediatek/mt8192/include/soc/memlayout.ld
index b1beef0970..2442e307c5 100644
--- a/src/soc/mediatek/mt8192/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8192/include/soc/memlayout.ld
@@ -53,8 +53,8 @@ SECTIONS
 
 	DRAM_START(0x40000000)
 	DRAM_DMA(0x40000000, 1M)
-	POSTRAM_CBFS_CACHE(0x40100000, 2M)
-	RAMSTAGE(0x40300000, 2M)
+	POSTRAM_CBFS_CACHE(0x40100000, 8M)
+	RAMSTAGE(0x40900000, 2M)
 
 	BL31(0x54600000, 0x60000)
 }
diff --git a/src/soc/mediatek/mt8195/include/soc/memlayout.ld b/src/soc/mediatek/mt8195/include/soc/memlayout.ld
index ec8fa9c992..1a1948e3e1 100644
--- a/src/soc/mediatek/mt8195/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8195/include/soc/memlayout.ld
@@ -44,8 +44,8 @@ SECTIONS
 
 	DRAM_START(0x40000000)
 	DRAM_DMA(0x40000000, 1M)
-	POSTRAM_CBFS_CACHE(0x40100000, 2M)
-	RAMSTAGE(0x40300000, 2M)
+	POSTRAM_CBFS_CACHE(0x40100000, 8M)
+	RAMSTAGE(0x40900000, 2M)
 
 	BL31(0x54600000, 0x60000)
 }