diff --git a/src/arch/i386/lib/hardwaremain.c b/src/arch/i386/lib/hardwaremain.c
index ba208c80db..e1bb377719 100644
--- a/src/arch/i386/lib/hardwaremain.c
+++ b/src/arch/i386/lib/hardwaremain.c
@@ -342,7 +342,7 @@ void hardwaremain(int boot_complete)
 
 	nvram_on();
 
-	keyboard_on();
+	//keyboard_on();
 
 #ifndef USE_NEW_SUPERIO_INTERFACE
 	enable_floppy();
diff --git a/src/lib/elfboot.c b/src/lib/elfboot.c
index 6d1da2e52d..8252f0d5a0 100644
--- a/src/lib/elfboot.c
+++ b/src/lib/elfboot.c
@@ -623,6 +623,7 @@ int elfboot(struct stream *stream, struct lb_memory *mem)
 	for(i = 0; i < ELF_HEAD_SIZE - (sizeof(Elf_ehdr) + sizeof(Elf_phdr)); i+=16) {
 		ehdr = (Elf_ehdr *)(&header[i]);
 		if (memcmp(ehdr->e_ident, ELFMAG, 4) != 0) {
+			printk_debug("NO header at %d\n", i);
 			continue;
 		}
 		printk_debug("Found ELF candiate at offset %d\n", i);
@@ -641,10 +642,12 @@ int elfboot(struct stream *stream, struct lb_memory *mem)
 		}
 		ehdr = 0;
 	}
+	printk_debug("header_offset is %d\n", header_offset);
 	if (header_offset == -1) {
 		goto out;
 	}
 
+	printk_debug("Try to load at offset 0x%x\n", header_offset);
 	result = elfload(stream, mem, 
 		header + header_offset , ELF_HEAD_SIZE - header_offset);
  out:
diff --git a/src/mainboard/digitallogic/smartcore-p3/Config b/src/mainboard/digitallogic/smartcore-p3/Config
new file mode 100644
index 0000000000..5d0d129f88
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/Config
@@ -0,0 +1,40 @@
+arch i386
+mainboardinit cpu/i386/entry16.inc
+mainboardinit cpu/i386/entry32.inc
+ldscript cpu/i386/entry16.lds
+ldscript cpu/i386/entry32.lds
+mainboardinit cpu/i386/reset16.inc
+ldscript cpu/i386/reset16.lds
+
+option SERIAL_SUPERIO_BASEADDRESS=0x3f0
+option HAVE_PIRQ_TABLE=1
+mainboardinit superio/SMC/fdc37c67x/setup_serial.inc
+
+mainboardinit pc80/serial.inc
+mainboardinit arch/i386/lib/console.inc
+northbridge intel/440bx
+southbridge intel/piix4e
+#mainboardinit cpu/p6/earlymtrr.inc
+mainboardinit ram/dump_northbridge.inc
+mainboardinit ram/ramtest.inc
+mainboardinit mainboard/digitallogic/smartcore-p3/do_ramtest.inc
+
+
+superio SMC/fdc37c67x 
+
+#option ENABLE_FIXED_AND_VARIABLE_MTRRS
+option PIIX4_DEVFN=0x38
+option NO_KEYBOARD=1
+option ZKERNEL_START=0xfffc0000
+option ZKERNEL_MASK=0x7f 
+option L440BX=1
+option SMC_BASE=0x3F0
+
+object mainboard.o
+object irq_tables.o
+
+cpu p6
+cpu p5
+
+option RAM_TEST=1
+
diff --git a/src/mainboard/digitallogic/smartcore-p3/config.etherboot b/src/mainboard/digitallogic/smartcore-p3/config.etherboot
new file mode 100644
index 0000000000..fc2c21ab9a
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/config.etherboot
@@ -0,0 +1,27 @@
+# Sample config file for Intel 430TX chipset on the Smartcore P5
+
+# This will make a target directory of ./smartcore-p5
+target smartcore-p5
+
+# ASUS CUA  main board
+mainboard digitallogic/smartcore-p5
+
+# option HAVE_PIRQ_TABLE=1
+# Enable Serial Console for debugging
+option SERIAL_CONSOLE=1
+option NO_KEYBOARD=1
+#nooption NO_KEYBOARD
+#keyboard pc80
+option INBUF_COPY
+option DEFAULT_CONSOLE_LOGLEVEL=7
+#option MAXIMUM_CONSOLE_LOGLEVEL=10
+#option DEBUG=1
+option USE_GENERIC_ROM=1
+option ROM_SIZE=262144
+
+
+# MEMORY TESTING USING MEMTEST
+option USE_ELF_BOOT=1
+
+payload ../eepro100.ebi
+nooption RAMTEST
diff --git a/src/mainboard/digitallogic/smartcore-p3/config.example b/src/mainboard/digitallogic/smartcore-p3/config.example
new file mode 100644
index 0000000000..e152803905
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/config.example
@@ -0,0 +1,20 @@
+# Sample config file for Intel 430TX chipset on the Smartcore P5
+
+# This will make a target directory of ./smartcore-p5
+target smartcore-p3
+
+mainboard digitallogic/smartcore-p3
+
+# Enable Serial Console for debugging
+option SERIAL_CONSOLE=1
+option NO_KEYBOARD=1 
+option INBUF_COPY=1
+option DEFAULT_CONSOLE_LOGLEVEL=9
+option MAXIMUM_CONSOLE_LOGLEVEL=9
+option DEBUG=1
+option USE_GENERIC_ROM=1
+
+# MEMORY TESTING USING MEMTEST
+option USE_ELF_BOOT=1
+option RAMTEST=1
+payload ../82559er.ebi
diff --git a/src/mainboard/digitallogic/smartcore-p3/do_ramtest.inc b/src/mainboard/digitallogic/smartcore-p3/do_ramtest.inc
new file mode 100644
index 0000000000..e22381e142
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/do_ramtest.inc
@@ -0,0 +1,5 @@
+	mov $0x00000000, %eax
+	mov $0x0009ffff, %ebx
+	mov $16, %ecx
+
+	CALLSP(ramtest)
diff --git a/src/mainboard/digitallogic/smartcore-p3/irq_tables.c b/src/mainboard/digitallogic/smartcore-p3/irq_tables.c
new file mode 100644
index 0000000000..2e33a2cc21
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/irq_tables.c
@@ -0,0 +1,42 @@
+/* This file was generated by getpir.c, do not modify! 
+   (but if you do, please run checkpir on it to verify)
+   Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
+
+   Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
+*/
+
+#include <arch/pirq_routing.h>
+
+const struct irq_routing_table intel_irq_routing_table = {
+	PIRQ_SIGNATURE, /* u32 signature */
+	PIRQ_VERSION,   /* u16 version   */
+	32+16*18,        /* there can be total 18 devices on the bus */
+	0,           /* Where the interrupt router lies (bus) */
+	0x38,           /* Where the interrupt router lies (dev) */
+	0,         /* IRQs devoted exclusively to PCI usage */
+	0x8086,         /* Vendor */
+	0x122e,         /* Device */
+	0,         /* Crap (miniport) */
+	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+	0x8a,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+	{
+		{0,0x80, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0, 0},
+		{0,0x48, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x1, 0},
+		{0,0x50, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}}, 0x2, 0},
+		{0,0x58, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}}, 0x3, 0},
+		{0,0x60, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}}, 0x4, 0},
+		{0,0x38, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0, 0},
+		{0,0xa0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0x88, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0x98, {{0x61, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0x90, {{0x60, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0x78, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}}, 0, 0},
+		{0x1,0x48, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x1, 0},
+		{0x1,0x50, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}}, 0x2, 0},
+		{0x1,0x58, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}}, 0x3, 0},
+		{0x1,0x60, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}}, 0x4, 0},
+		{0x1,0x68, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x5, 0},
+		{0x1,0x70, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}}, 0x6, 0},
+		{0x1,0x78, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}}, 0x7, 0},
+	}
+};
diff --git a/src/mainboard/digitallogic/smartcore-p3/mainboard.c b/src/mainboard/digitallogic/smartcore-p3/mainboard.c
new file mode 100644
index 0000000000..2d393d97a0
--- /dev/null
+++ b/src/mainboard/digitallogic/smartcore-p3/mainboard.c
@@ -0,0 +1,183 @@
+#include <printk.h>
+#include <pci.h>
+
+#include <cpu/p5/io.h>
+
+// this needs to be moved about a bit to northbridge.c etc.
+
+
+void mainboard_fixup()
+{
+	struct pci_dev *pm_pcidev;
+        // struct pci_dev  *host_bridge_pcidev; 
+        struct pci_dev *nic_pcidev;
+	unsigned smbus_io, pm_io;
+	unsigned int i, j;
+	printk_debug("intel_mainboard_fixup()\n");
+
+#if 1
+	pm_pcidev = pci_find_device(0x8086, 0x7113, 0);
+	nic_pcidev = pci_find_device(0x8086, 0x1229, 0);
+	// host_bridge_pcidev = pci_find_slot(0, PCI_DEVFN(0,0));
+#endif
+#if 1
+	pci_write_config_byte(nic_pcidev, 0x3c, 21);
+#endif
+#if 0
+	{
+	u8 byte;
+	u16 word;
+	u32 dword;
+	for(i = 0; i < 8; i++) {
+		pci_read_config_byte(host_bridge_pcidev, 0x60 +i, &byte);
+		printk_debug("DRB[i] = 0x%02x\n", byte);
+	}
+	pci_read_config_byte(host_bridge_pcidev, 0x57, &byte);
+	printk_debug("DRAMC = 0x%02x\n", byte);
+	pci_read_config_byte(host_bridge_pcidev, 0x74, &byte);
+	printk_debug("RPS = 0x%02x\n", byte);
+	pci_read_config_word(host_bridge_pcidev, 0x78, &word);
+	printk_debug("PGPOL = 0x%04x\n", word);
+	pci_read_config_dword(host_bridge_pcidev, 0x50, &dword);
+	printk_debug("NBXCFG = 0x%04x\n", dword);
+	}
+	
+#endif
+#if 0
+
+	printk_debug("Reset Control Register\n");
+	outb(((inb(0xcf9) & 0x04) | 0x02), 0xcf9);
+
+	printk_debug("port 92\n");
+	outb((inb(0x92) & 0xFE), 0x92);
+
+	printk_debug("Disable Nmi\n");
+	outb(0, 0x70);
+
+	printk_debug("enabling smbus\n");
+#if 0
+	smbus_io = NewPciIo(0x10);
+#else
+	smbus_io = 0xFFF0;
+#endif
+	pci_write_config_dword(pm_pcidev, 0x90, smbus_io | 1); /* iobase addr */
+	pci_write_config_byte(pm_pcidev, 0xd2,  (0x4 << 1) | 1); /* smbus enable */
+	pci_write_config_word(pm_pcidev, 0x4, 1); /* iospace enable */
+
+
+	printk_debug("enable pm functions\n");
+#if 0
+	pm_io = NewPciIo(0x40);
+#else
+	pm_io = 0xFF80;
+#endif
+	pci_write_config_dword(pm_pcidev, 0x40, pm_io | 1); /* iobase addr */
+	pci_write_config_byte(pm_pcidev, 0x80, 1);  /* enable pm io address */
+
+	printk_debug("disabling smi\n");
+	/* GLBEN */
+	outw(0x00,      pm_io + 0x20);
+	/* GLBCTL */
+	outl((1 << 24), pm_io + 0x28);
+	
+	printk_debug("Disable more pm stuff\n");
+	/* PMEN */
+	outw((1 << 8), pm_io + 0x02);
+	/* PMCNTRL */
+	outw((0x5 << 10) , pm_io + 0x4);
+	/* PMTMR */
+	outl(0, pm_io + 0x08);
+	/* GPEN */
+	outw(0, pm_io + 0x0e);
+	/* PCNTRL */
+	outl(0, pm_io + 0x10);
+	/* GLBSTS */
+	/* DEVSTS */
+	/* GLBEN see above */
+	/* GLBCTL see above */
+	/* DEVCTL */
+	outl(0, pm_io + 0x2c);
+	/* GPIREG */
+	/* GPOREG */
+	
+	printk_debug("Set the subsystem vendor id\n");
+	pci_write_config_word(host_bridge_pcidev, 0x2c, 0x8086);
+
+	printk_debug("Disabling pm stuff in pci config space\n");
+
+#define MAX_COUNTERS
+#ifndef MAX_COUNTERS
+	/* counters to 0 */
+#define WHICH_COUNTERS(min,max) min
+#else
+	/* max out the counters */
+#define WHICH_COUNTERS(min,max) max
+#endif
+
+	/* CNTA */
+	pci_write_config_dword(pm_pcidev, 0x44, WHICH_COUNTERS(0x004000f0, 0xFFFFFFFF));
+
+	/* CNTB */
+	pci_write_config_dword(pm_pcidev, 0x48, WHICH_COUNTERS(0x00000400, 0x007c07df));
+
+	/* GPICTL */
+	pci_write_config_dword(pm_pcidev, 0x4c, 0);
+
+	/* DEVRESD */
+	pci_write_config_dword(pm_pcidev, 0x50, 0);
+	
+	/* DEVACTA */
+	pci_write_config_dword(pm_pcidev, 0x54, 0);
+
+	/* DEVACTB */
+	pci_write_config_dword(pm_pcidev, 0x58, 0);
+
+	/* DEVRESA */
+	pci_write_config_dword(pm_pcidev, 0x5c, 0);
+
+	/* DEVRESB */
+	pci_write_config_dword(pm_pcidev, 0x60, 0);
+
+	/* DEVRESC */
+	pci_write_config_dword(pm_pcidev, 0x64, 0); /* might kill the serial port */
+
+	/* DEVRESE */
+	pci_write_config_dword(pm_pcidev, 0x68, 0);
+
+	/* DEVRESF */
+	pci_write_config_dword(pm_pcidev, 0x6c, 0);
+
+	/* DEVRESG */
+	pci_write_config_dword(pm_pcidev, 0x70, 0);
+
+	/* DEVRESH */
+	pci_write_config_dword(pm_pcidev, 0x74, 0);
+
+	/* DEVRESI */
+	pci_write_config_dword(pm_pcidev, 0x78, 0);
+
+	/* DEVRESJ */
+	pci_write_config_dword(pm_pcidev, 0x7c, 0);
+
+#endif
+
+#if 1
+	
+	/* Verify that smi is disabled */
+	printk_debug("Testing SMI\r\n");
+	{
+	u32 value;
+	pci_read_config_dword(pm_pcidev, 0x58, &value);
+	pci_write_config_dword(pm_pcidev, 0x58, value | (1 << 25));
+	}
+	outb(inb(0xb2), 0xb2);
+	printk_debug("SMI disabled\r\n");
+#endif
+#if 0
+	
+	for(i = 0; i < 255; i++) {
+		printk_debug("%08x\r\n", i);
+		__rdtsc_delay2(1000000000UL, pm_io);
+	}
+#endif
+}
diff --git a/src/mainboard/lippert/roadrunner2/Config b/src/mainboard/lippert/roadrunner2/Config
index 2f35b54a2c..9a1dc2d167 100644
--- a/src/mainboard/lippert/roadrunner2/Config
+++ b/src/mainboard/lippert/roadrunner2/Config
@@ -30,7 +30,7 @@ mainboardinit arch/i386/lib/console.inc
 
 northbridge nsc/gx1
 southbridge nsc/cs5530
-nsuperio SMC/fdc37b72x com1={1} port=0x370
+nsuperio SMC/fdc37b72x com1={1,.baud=38400} port=0x370 keyboard={1}
 
 ########################################################################
 # Lots of constans, you probably don't need to change anything here.
@@ -58,6 +58,7 @@ object mainboard.o
 option ZKERNEL_START=0xfffc0000
 object irq_tables.o
 option HAVE_PIRQ_TABLE=1
+dir /src/pc80/ide
 
 # Local variables:
 #   compile-command: "make -C /export/bios/voyager2"