From 49088b312b159bb17a9330eda6a88d6f324ea146 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Fri, 2 May 2014 15:12:48 -0700 Subject: [PATCH] broadwell: acpi: Clean up acpi table creation code - Fix header includes - Use ACPI_BASE_ADDRESS instead of get_pmbase() - Remove chip_operations as those are now in chip.c BUG=chrome-os-partner:28234 TEST=None Change-Id: I28712275a46b64941796bca46ec1bd648b8178f6 Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/199408 Reviewed-by: Aaron Durbin --- src/soc/intel/broadwell/acpi.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 574d5e05c8..98ea82b8a7 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -18,21 +18,30 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include -#include #include #include +#include +#include +#include +#include +#include +#include +#include +#include #include #include -#include +#include #include -#include -#include -#include "haswell.h" -#include "chip.h" - -#include - +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include /* * List of suported C-states in this processor. Only the ULT parts support C8, @@ -477,7 +486,7 @@ static int generate_P_state_entries(int core, int cores_per_package) void generate_cpu_entries(void) { int len_pr; - int coreID, cpuID, pcontrol_blk = get_pmbase(), plen = 6; + int coreID, cpuID, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6; int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); int numcpus = totalcores/cores_per_package; @@ -514,6 +523,3 @@ void generate_cpu_entries(void) } } -struct chip_operations cpu_intel_haswell_ops = { - CHIP_NAME("Intel Haswell CPU") -};