storm: prepare to enabling Vboot2

This change adds to makefiles sources necessary for VBOOT2 verstage
without actually enabling verstage yet.

BRANCH=storm
BUG=chrome-os-partner:34161
TEST=not much testing yet, just successful compilation.

Change-Id: I1d7944e681f8a4b113a90ac028a0faba4423be89
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/234643
This commit is contained in:
Vadim Bendebury 2014-12-10 20:11:30 -08:00 committed by chrome-internal-fetch
commit 48847ab8ac
4 changed files with 16 additions and 3 deletions

View file

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
select COMMON_CBFS_SPI_WRAPPER
select HAVE_HARD_RESET
select MAINBOARD_HAS_BOOTBLOCK_INIT
select RETURN_FROM_VERSTAGE
select SOC_QC_IPQ806X
select SPI_FLASH
select SPI_FLASH_SPANSION

View file

@ -20,6 +20,9 @@
bootblock-y += cdp.c
bootblock-y += reset.c
verstage-y += cdp.c
verstage-y += chromeos.c
verstage-y += memlayout.ld
verstage-y += reset.c
romstage-y += romstage.c

View file

@ -28,12 +28,15 @@ void main(void)
{
void *entry;
cbmem_initialize_empty();
cbmem_initialize();
console_init();
#if CONFIG_VBOOT2_VERIFY_FIRMWARE
entry = vboot2_load_ramstage();
#else
vboot_verify_firmware(romstage_handoff_find_or_add());
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
#endif
stage_exit(entry);
}

View file

@ -23,6 +23,12 @@ bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c
bootblock-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
verstage-y += clock.c
verstage-y += gpio.c
verstage-y += spi.c
verstage-y += timer.c
verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
romstage-y += clock.c
romstage-y += gpio.c
romstage-$(CONFIG_SPI_FLASH) += spi.c