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soc/intel/jasperlake: Replace CFR enums with booleans

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Boolean options are intended to represent generic "Enable"/"Disable"
options, but without enum options' extra bloat in the CFR structures.

Change-Id: If9030e770a59d9de87f7b0f2112887db6126aacf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91352
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Angel Pons 2026-02-18 21:32:15 +01:00
commit 47bc0a727c
1 changed files with 9 additions and 25 deletions
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34
src/soc/intel/jasperlake/include/soc/cfr.h
View file

@ -11,15 +11,11 @@
#include <soc/soc_chip.h>
/* IGD Enabled */
static const struct sm_object igd_enabled = SM_DECLARE_ENUM({
static const struct sm_object igd_enabled = SM_DECLARE_BOOL({
.opt_name = "igd_enabled",
.ui_name = "Enable the Intel iGPU",
.ui_helptext = "Enable or disable the Intel iGPU",
.default_value = !CONFIG(SOC_INTEL_DISABLE_IGD),
.values = (const struct sm_enum_value[]) {
{ "Disabled", 0 },
{ "Enabled", 1 },
SM_ENUM_VALUE_END },
});
/* IGD Aperture Size */
@ -33,7 +29,7 @@ static const struct sm_object igd_aperture = SM_DECLARE_ENUM({
{ " 256 MB", IGD_AP_SZ_256MB },
{ " 512 MB", IGD_AP_SZ_512MB },
SM_ENUM_VALUE_END },
}, WITH_DEP_VALUES(&igd_enabled, 1));
}, WITH_DEP_VALUES(&igd_enabled, true));
/* IGD DVMT pre-allocated memory */
static const struct sm_object igd_dvmt = SM_DECLARE_ENUM({
@ -49,42 +45,30 @@ static const struct sm_object igd_dvmt = SM_DECLARE_ENUM({
{ "128 MB", IGD_SM_128MB },
{ "160 MB", IGD_SM_160MB },
SM_ENUM_VALUE_END },
}, WITH_DEP_VALUES(&igd_enabled, 1));
}, WITH_DEP_VALUES(&igd_enabled, true));
/* Legacy 8254 Timer */
static const struct sm_object legacy_8254_timer = SM_DECLARE_ENUM({
static const struct sm_object legacy_8254_timer = SM_DECLARE_BOOL({
.opt_name = "legacy_8254_timer",
.ui_name = "Legacy 8254 Timer",
.ui_helptext = "Enable the legacy 8254 timer by disabling clock gating.",
.default_value = 0,
.values = (const struct sm_enum_value[]) {
{ "Disabled", 0 },
{ "Enabled", 1 },
SM_ENUM_VALUE_END },
.default_value = false,
});
/* S0ix Enable */
static const struct sm_object s0ix_enable = SM_DECLARE_ENUM({
static const struct sm_object s0ix_enable = SM_DECLARE_BOOL({
.opt_name = "s0ix_enable",
.ui_name = "Modern Standby (S0ix)",
.ui_helptext = "Enabled: use Modern Standby / S0ix. Disabled: use ACPI S3 sleep",
.default_value = 1,
.values = (const struct sm_enum_value[]) {
{ "Disabled", 0 },
{ "Enabled", 1 },
SM_ENUM_VALUE_END },
.default_value = true,
});
/* VT-d */
static const struct sm_object vtd = SM_DECLARE_ENUM({
static const struct sm_object vtd = SM_DECLARE_BOOL({
.opt_name = "vtd",
.ui_name = "VT-d",
.ui_helptext = "Enable or disable Intel VT-d (virtualization)",
.default_value = 1,
.values = (const struct sm_enum_value[]) {
{ "Disabled", 0 },
{ "Enabled", 1 },
SM_ENUM_VALUE_END },
.default_value = true,
});
#endif /* _JASPERLAKE_CFR_H_ */