mb/google/ocelot: Add support for AUDIO_MAX98360_ALC5682I_I2S

This change adds support for I2S codec in the device tree and enables
it based on the fw_config based on WCL_GPIO_Implementation Rev0p7.

RDC Doc no: 836031

BUG=b:465888555
TEST=Boot on google ocelot board and Enable I2C Codec for Audio.
Check Mic and Speaker functionality

Change-Id: I51fb849bf365108be1ff59d65069329e5fd08824
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90427
Reviewed-by: P, Usha <usha.p@intel.com>
Reviewed-by: Avi Uday <aviuday@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Varun Upadhyay 2025-12-09 09:44:48 +05:30 committed by Matt DeVillier
commit 47a24d1d51
2 changed files with 61 additions and 31 deletions

View file

@ -12,37 +12,36 @@
#define GPIO_CONFIGURE_PADS(t) gpio_configure_pads(t, ARRAY_SIZE(t))
static const struct pad_config i2s_enable_pads[] = {
/* I2S_MCLK1_OUT */
/* GPP_D09: I2S_MCLK1_OUT */
PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2),
/* I2S0_SCLK_HDR */
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
/* I2S0_SFRM_HDR */
PAD_CFG_NF(GPP_D11, NONE, DEEP, NF1),
/* I2S0_TXD_HDR */
PAD_CFG_NF(GPP_D12, NONE, DEEP, NF1),
/* I2S0_RXD_HDR */
PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1),
/* I2S1_TXD_HDR */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
/* I2S1_RXD_HDR */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
/* I2S1_SCLK_HDR */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF1),
/* I2S1_SFRM_HDR */
PAD_CFG_NF(GPP_S03, NONE, DEEP, NF1),
/* I2S2_SCLK_HDR */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF1),
/* I2S2_SFRM_HDR */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF1),
/* I2S2_TXD_HDR */
PAD_NC(GPP_S06, NONE),
/* I2S2_RXD_HDR */
PAD_NC(GPP_S07, NONE),
/* DMIC_CLK */
PAD_NC(GPP_D16, NONE),
/* DMIC_DATA */
PAD_NC(GPP_D17, NONE),
/* GPP_D10: I2S0_SCLK_HDR */
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2),
/* GPP_D11: I2S0_SFRM_HDR */
PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2),
/* GPP_D12: I2S0_TXD_HDR */
PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2),
/* GPP_D13: I2S0_RXD_HDR */
PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2),
/* GPP_S00: I2S1_TXD_HDR */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6),
/* GPP_S01: I2S1_RXD_HDR */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6),
/* GPP_S02: I2S1_SCLK_HDR */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6),
/* GPP_S03: I2S1_SFRM_HDR */
PAD_CFG_NF(GPP_S03, NONE, DEEP, NF6),
/* GPP_S04: I2S2_SCLK_HDR */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF6),
/* GPP_S05: I2S2_SFRM_HDR */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF6),
/* GPP_S06: DMIC1_CLK (HDR) */
PAD_CFG_NF(GPP_S06, NONE, DEEP, NF5),
/* GPP_S07: DMIC1_DATA (HDR) */
PAD_CFG_NF(GPP_S07, NONE, DEEP, NF5),
/* GPP_D16: DMIC_CLK */
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF3),
/* GPP_D17: DMIC_DATA */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF3),
};
static const struct pad_config hda_enable_pads[] = {
@ -93,6 +92,8 @@ static const struct pad_config sndw_alc721_enable_pads[] = {
};
static const struct pad_config audio_disable_pads[] = {
/* GPP_D09: I2S_MCLK1_OUT */
PAD_NC(GPP_D09, NONE),
/* GPP_D10: HDA_BCLK (HDR) */
PAD_NC(GPP_D10, NONE),
/* GPP_D11: HDA_SYNC (HDR) */

View file

@ -92,7 +92,7 @@ chip soc/intel/pantherlake
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
[PchSerialIoIndexI2C3] = PchSerialIoPci,
[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
@ -108,6 +108,7 @@ chip soc/intel/pantherlake
#| Field | Value |
#+-------------------+---------------------------+
#| I2C1 | TPM(cr50) |
#| I2C3 | Audio |
#| I2C5 | Touchpad |
#+-------------------+---------------------------+
register "common_soc_config" = "{
@ -118,6 +119,10 @@ chip soc/intel/pantherlake
.speed = I2C_SPEED_FAST,
.early_init = 1,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
.early_init = 1,
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
},
@ -532,6 +537,22 @@ chip soc/intel/pantherlake
device i2c 50 on end
end
end
device ref i2c3 on
chip drivers/i2c/generic
register "hid" = ""RTL5682""
register "name" = ""RT58""
register "desc" = ""Headset Codec""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F17)"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
probe AUDIO AUDIO_MAX98360_ALC5682I_I2S
end
end
end #I2C3
device ref i2c5 on
chip drivers/i2c/hid
register "generic.hid" = ""HFW68H""
@ -586,6 +607,14 @@ chip soc/intel/pantherlake
end
end
end
chip drivers/generic/max98357a
register "hid" = ""MX98360A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A15)"
register "sdmode_delay" = "5"
device generic 0 on
probe AUDIO AUDIO_MAX98360_ALC5682I_I2S
end
end
end
end
end