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mb/google/nissa/var/meliks: Disable external FIVR

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Disable external FIVR in overridetree.cb since meliks will remove
external FIVR in next phase.

BUG=b:402647064
BRANCH=nissa
TEST=FW_NAME=meliks emerge-nissa coreboot

Change-Id: If1584da51976fb682733b246ce7af3786ae55947
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86992
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Seunghwan Kim 2025-03-25 10:59:12 +09:00 • committed by Felix Held
commit 470e459c4d
1 changed files with 0 additions and 15 deletions
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15
src/mainboard/google/brya/variants/meliks/overridetree.cb
View file

@ -77,21 +77,6 @@ chip soc/intel/alderlake
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
# Configure external V1P05/Vnn/VnnSx Rails
register "ext_fivr_settings" = "{
.configure_ext_fivr = 1,
.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX ,
.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX ,
.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_RETENTION,
.v1p05_voltage_mv = 1050,
.vnn_voltage_mv = 780,
.vnn_sx_voltage_mv = 1050,
.v1p05_icc_max_ma = 500,
.vnn_icc_max_ma = 500,
}"
# VR Settings
register "domain_vr_config[VR_DOMAIN_IA]" = "{
.vr_config_enable = 1,