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add Winbond IO support

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This commit is contained in:
Li-Ta Lo 2002-07-03 06:39:45 +00:00
commit 46fd6ab5e1
5 changed files with 164 additions and 10 deletions
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2
src/mainboard/bcm/e100/Config
View file

@ -13,6 +13,8 @@ option FINAL_MAINBOARD_FIXUP
option HAVE_PIRQ_TABLE=1
dir /src/ram
option USE_RAMTEST=1
option MAINBOARD_VENDOR=BCM
option MAINBOARD_PART_NUMBER=eb100
object mainboard.o
object irq_tables.o
keyboard pc80

2
src/mainboard/bcm/e100/ipl.S
View file

@ -116,7 +116,7 @@ sis630ipl_start:
#else /* !STD_FLASH */
#if (USE_DOC_MIL == 1) || (USE_DOC_2000_TSOP == 1)
# include "rom/doc_mil.inc"
#else (USE_DOC_MIL_PLUS == 1)
#elif (USE_DOC_MIL_PLUS == 1)
# include "rom/doc_mil_plus.inc"
#endif
#endif /* STD_FLASH */

10
src/mainboard/bcm/e100/irq_tables.c
View file

@ -1,10 +1,10 @@
#include <arch/pirq_routing.h>
#define CHECKSUM 0x1F
#define CHECKSUM 0x22
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
32+16*6, /* there can be total 6 devices on the bus */
32+16*4, /* there can be total 6 devices on the bus */
0x00, /* Bus 0 */
0x08, /* Device 1, Function 0 */
0x0C20, /* reserve IRQ 11, 10, 5, for PCI */
@ -17,10 +17,10 @@ const struct irq_routing_table intel_irq_routing_table = {
/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
{0x00, 0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
0x01, 0x00},
{0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}},
0x02, 0x00},
{0x00, 0x58, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
0x00, 0x00},
{0x00, 0x68, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
0x03, 0x00},
0x00, 0x00},
{0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}},
0x00, 0x00},
{0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},

158
src/mainboard/bcm/e100/mainboard.c
View file

@ -58,27 +58,176 @@ led_off(int led)
outb(level, acpibase + 0x66);
}
#define BASE 0x2e
#define BASE1 0x4e
void
winbond_83697_init(void)
{
printk_info("Setting 2E ports.......\n");
outb(0x87, BASE);
outb(0x87, BASE);
outb(0x2c,BASE);
outb(0x55,BASE+1);
/* URA */
outb(0x07, BASE);
outb(0x02, BASE+1);
outb(0x30, BASE);
outb(0x01, BASE+1);
outb(0x60, BASE);
outb(0x03, BASE+1);
outb(0x61, BASE);
outb(0xe8, BASE+1);
outb(0x70, BASE);
outb(0x05, BASE+1);
outb(0xf0, BASE);
outb(0x40, BASE+1);
/* URB */
outb(0x07, BASE);
outb(0x03, BASE+1);
outb(0x30, BASE);
outb(0x01, BASE+1);
outb(0x60, BASE);
outb(0x02, BASE+1);
outb(0x61, BASE);
outb(0xe8, BASE+1);
outb(0x70, BASE);
outb(0x06, BASE+1);
outb(0xf0, BASE);
outb(0x40, BASE+1);
outb(0xf1, BASE);
outb(0x00, BASE+1);
/*URC */
outb(0x07, BASE);
outb(0x0d, BASE+1);
outb(0x30, BASE);
outb(0x01, BASE+1);
outb(0x60, BASE);
outb(0x03, BASE+1);
outb(0x61, BASE);
outb(0xf8, BASE+1);
outb(0x70, BASE);
outb(0x03, BASE+1);
outb(0xf0, BASE);
outb(0x40, BASE+1);
/*URD*/
outb(0x07, BASE);
outb(0x0e, BASE+1);
outb(0x30, BASE);
outb(0x01, BASE+1);
outb(0x60, BASE);
outb(0x02, BASE+1);
outb(0x61, BASE);
outb(0xf8, BASE+1);
outb(0x62, BASE);
outb(0x00, BASE+1);
outb(0x63, BASE);
outb(0x00, BASE+1);
outb(0x70, BASE);
outb(0x04, BASE+1);
outb(0xf0, BASE);
outb(0x40, BASE+1);
outb(0xaa,BASE);
/*==================4E================*/
printk_info("Setting 4E ports.......\n");
/* URE */
// outb(0x40,0x26);
outb(0x87, BASE1);
outb(0x87, BASE1);
outb(0x2c, BASE1);
outb(0x55, BASE1+1);
outb(0x07, BASE1);
outb(0x02, BASE1+1);
outb(0x30, BASE1);
outb(0x01, BASE1+1);
outb(0x60, BASE1);
outb(0x03, BASE1+1);
outb(0x61, BASE1);
outb(0x18, BASE1+1);
outb(0x70, BASE1);
outb(0x05, BASE1+1);
outb(0xf0, BASE1);
outb(0x40, BASE1+1);
/* URF */
outb(0x07, BASE1);
outb(0x03, BASE1+1);
outb(0x30, BASE1);
outb(0x01, BASE1+1);
outb(0x60, BASE1);
outb(0x03, BASE1+1);
outb(0x61, BASE1);
outb(0x28, BASE1+1);
outb(0x70, BASE1);
outb(0x06, BASE1+1);
outb(0xf0, BASE1);
outb(0x40, BASE1+1);
outb(0xf1, BASE1);
outb(0x00, BASE1+1);
/*URG */
outb(0x07, BASE1);
outb(0x0d, BASE1+1);
outb(0x30, BASE1);
outb(0x01, BASE1+1);
outb(0x60, BASE1);
outb(0x02, BASE1+1);
outb(0x61, BASE1);
outb(0x18, BASE1+1);
outb(0x70, BASE1);
outb(0x03, BASE1+1);
outb(0xf0, BASE1);
outb(0x40, BASE1+1);
/*URH*/
outb(0x07, BASE1);
outb(0x0e, BASE1+1);
outb(0x30, BASE1);
outb(0x01, BASE1+1);
outb(0x60, BASE1);
outb(0x02, BASE1+1);
outb(0x61, BASE1);
outb(0x28, BASE1+1);
outb(0x62, BASE1);
outb(0x00, BASE1+1);
outb(0x63, BASE1);
outb(0x00, BASE1+1);
outb(0x70, BASE1);
outb(0x04, BASE1+1);
outb(0xf0, BASE1);
outb(0x40, BASE1+1);
outb(0xaa,BASE1);
printk_info("completed setting ports\n");
}
void
mainboard_fixup(void)
{
struct mem_range *mem;
unsigned long ramsize;
int errors = 0;
struct pci_dev *pcidev;
struct pci_dev *pcidev;
u8 data;
pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, (void *)NULL);
pci_read_config_word(pcidev, 0x74, &acpibase);
pci_read_config_byte(pcidev, 0x7c, &data);
pci_write_config_byte(pcidev, 0x7c, data | 0x02);
led_on(10);
beep_on();
/* FIXME this is not how sizeram is intened to be called! */
mem = sizeram();
ramsize = (mem[1].sizek + mem[1].basek) * 1024;
if (ramcheck(0x00100000, ramsize, 20) != 0) {
beep_on();
error("DRAM Test Error");
}
beep_off();
led_off(10);
led_on(9);
@ -91,5 +240,8 @@ final_mainboard_fixup(void)
printk_info("SiS 550 (and similar)...");
//winbond_83697_init();
final_southbridge_fixup();
}

2
src/northsouthbridge/sis/550/ipl.S
View file

@ -233,7 +233,7 @@ sis630ipl_start:
#else /* !STD_FLASH */
#if (USE_DOC_MIL == 1) || (USE_DOC_2000_TSOP == 1)
# include "rom/doc_mil.inc"
#else (USE_DOC_MIL_PLUS == 1)
#elif (USE_DOC_MIL_PLUS == 1)
# include "rom/doc_mil_plus.inc"
#endif
#endif /* STD_FLASH */