diff --git a/src/northbridge/acer/m1631/chipset_init.inc b/src/northbridge/acer/m1631/chipset_init.inc
index f65180d0e1..4f56a22615 100644
--- a/src/northbridge/acer/m1631/chipset_init.inc
+++ b/src/northbridge/acer/m1631/chipset_init.inc
@@ -21,31 +21,32 @@ register_table:
 	.byte 0x63, 0x00, 0x08
 	.byte 0x67, 0xff, 0x09	/*0x08*/       
 #ifndef USE_DOC_MIL
+	/* these are set in ipl.S */
 	.byte 0x6c, 0xfc, 0x00       	
 	.byte 0x6d, 0xd7, 0x00  /* probably wrong OR value?*/
   	.byte 0x6f, 0xff, 0x40         
+	.byte 0x73, 0xff, 0x40
+	.byte 0x77, 0xff, 0x40
+	.byte 0x82, 0xff, 0x10
+	.byte 0x8e, 0xff, 0x08
 #endif
 /*	.byte 0x70, 0xfc, 0x00    */
 /*	.byte 0x74, 0xfc, 0x00    */
 #	.byte 0x71, 0xd7, 0x00 /* probably wrong OR value?*/
 #	.byte 0x75, 0xd7, 0x00 /* probably wrong OR value?*/
-	.byte 0x73, 0xff, 0x40
-	.byte 0x77, 0xff, 0x40
 #	.byte 0x7c, 0x00, 0x11 /* MCLK = 66 MHZ */
 #	.byte 0x7d, 0x00, 0xc4 /* MCLK = 66 MHZ */
 #	.byte 0x7e, 0x03, 0x28
 
 	.byte 0x91, 0x00, 0x70  /*cheng 0629 add for test*/
-
 	.byte 0x7f, 0xef, 0x20	/*cheng 0629   0x24*/
 	.byte 0x80, 0xf9, 0x01
 	.byte 0x81, 0xb3, 0x00
-	.byte 0x82, 0xff, 0x10
 	.byte 0x83, 0x00, 0x00
 	.byte 0x84, 0xfe, 0x00
 	.byte 0x87, 0xff, 0x00
 	.byte 0x88, 0xff, 0x08
-	.byte 0x8e, 0xff, 0x08
+
 	.byte 0x93, 0xff, 0x07
 	.byte 0xa0, 0x00, 0x30
 	.byte 0xa1, 0x00, 0x40		
@@ -85,16 +86,23 @@ register_table:
 
 m1535_table:
 	.byte 0x58, 0x00, 0x4c	// enable IDE controller
+	.byte 0x44, 0x00, 0x1d	// set edge mode, primary channel IRQ 14
+				// for IDE 1
+	.byte 0x47, 0xff, 0x40	// enable flash rom r/w
 	.byte 0x0
 	// something in here is breaking the CUA very badly.
 	// So I turned it off for now -- RGM
 	.byte 0x0
 	.byte 0x41, 0x00, 0x0d	// enable superIO recovery
-	.byte 0x47, 0xff, 0x40	// enable flash rom r/w
-	.byte 0x44, 0x00, 0x1d	// set edge mode, primary channel IRQ 14
+
+
 #	.byte 0x75, 0x00, 0x0f	// secondary channel IRQ 15
 #0706cheng	.byte 0x70, 0x00, 0x12	// set serial IRQ data frame
 	.byte 0x72, 0x00, 0x0a		/*cheng 0706 add*/
+					// Collins this changes the 
+					// IDESEL of the 7101. 
+					// I don't want
+					// this, do I? Ron
 
 	.byte 0x0 // end of m1535_table 
 chipsetinit_start: