reformat for final_southbrigde_fixup(), more code review is needed
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Li-Ta Lo
parent
1daaea1bdc
commit
46805e16f7
1 changed files with 85 additions and 85 deletions
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@ -73,100 +73,100 @@ void nvram_on()
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void
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final_southbridge_fixup()
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{
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struct pci_dev *pcidev;
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// ethernet fixup. This should all work, and doesn't, yet.
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// so we hack it for now.
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// need a manifest constant for the enet device.
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, 0x0900,
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(void *)NULL);
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struct pci_dev *pcidev;
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// ethernet fixup. This should all work, and doesn't, yet.
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// so we hack it for now.
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// need a manifest constant for the enet device.
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, 0x0900, (void *)NULL);
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if (pcidev != NULL) {
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u32 bar0 = 0xb001;
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// set the BAR 0 to 0xb000. Safe, high value, known good.
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// pci config set doesn't work for reasons we don't understand.
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pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, bar0);
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u32 bar0 = 0xb001;
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// set the BAR 0 to 0xb000. Safe, high value, known good.
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// pci config set doesn't work for reasons we don't understand.
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pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, bar0);
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// Make sure bus mastering is on. The tried-and-true probe in linuxpci.c
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// doesn't set this for some reason.
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pci_write_config_byte(pcidev, PCI_COMMAND,
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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// Make sure bus mastering is on. The tried-and-true probe in linuxpci.c
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// doesn't set this for some reason.
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pci_write_config_byte(pcidev, PCI_COMMAND,
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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// set the interrupt to 'b'
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pci_write_config_byte(pcidev, PCI_INTERRUPT_LINE, 0xb);
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// set the interrupt to 'b'
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pci_write_config_byte(pcidev, PCI_INTERRUPT_LINE, 0xb);
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} else {
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printk(KERN_ERR "Can't find ethernet interface\n");
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printk(KERN_ERR "Can't find ethernet interface\n");
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}
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// fix up southbridge interrupt enables.
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503,
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(void *)NULL);
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, (void *)NULL);
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if (pcidev != NULL) {
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unsigned char val;
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unsigned short acpibase = 0xc000, temp;
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int i;
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// put symbolic names in here soon ... so much typing, so little time.
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unsigned char val;
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unsigned short acpibase = 0xc000, temp;
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int i;
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// put symbolic names in here soon ... so much typing, so little time.
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// remap IRQ for PCI -- this is exactly what the BIOS does now.
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pci_write_config_byte(pcidev, 0x42, 0xa);
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pci_write_config_byte(pcidev, 0x43, 0xb);
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pci_write_config_byte(pcidev, 0x44, 0xc);
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// remap IRQ for PCI -- this is exactly what the BIOS does now.
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pci_write_config_byte(pcidev, 0x42, 0xa);
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pci_write_config_byte(pcidev, 0x43, 0xb);
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pci_write_config_byte(pcidev, 0x44, 0xc);
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// now set up legacy serial interrupts
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// that doesn't mean serial ports -- it's a serial interrupt
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// line from the superio (LPC)
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// first, enable them.
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pci_write_config_byte(pcidev, 0x70, 0x80);
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// skip the SMI, inta, etc. stuff.
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// enable IRQs 7 to 1
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pci_write_config_byte(pcidev, 0x72, 0xfd);
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pci_write_config_byte(pcidev, 0x73, 0xff);
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// the following is to turn off software watchdogs.
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// we co-op the address space from c000-cfff here. Temporarily.
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// Later, we need a better way to do this.
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// But since Linux doesn't even understand this yet, no issue.
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// Set a base address for ACPI of 0xc000
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pci_read_config_word(pcidev, 0x74, &temp);
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// now set up legacy serial interrupts
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// that doesn't mean serial ports -- it's a serial interrupt
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// line from the superio (LPC)
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// first, enable them.
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pci_write_config_byte(pcidev, 0x70, 0x80);
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// skip the SMI, inta, etc. stuff.
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// enable IRQs 7 to 1
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pci_write_config_byte(pcidev, 0x72, 0xfd);
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pci_write_config_byte(pcidev, 0x73, 0xff);
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printk(KERN_INFO "acpibase was 0x%x\n", temp);
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pci_write_config_word(pcidev, 0x74, acpibase);
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pci_read_config_word(pcidev, 0x74, &temp);
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printk(KERN_INFO "acpibase is 0x%x\n", temp);
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// now enable acpi
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi enable reg was 0x%x\n", val);
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val |= 0x80;
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pci_write_config_byte(pcidev, 0x40, val);
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi enable reg after set is 0x%x\n", val);
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printk(KERN_INFO "acpi status: word at 0x56 is 0x%x\n",
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inw(acpibase+0x56));
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printk(KERN_INFO "acpi status: byte at 0x4b is 0x%x\n",
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inb(acpibase + 0x4b));
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// the following is to turn off software watchdogs.
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// we co-op the address space from c000-cfff here. Temporarily.
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// Later, we need a better way to do this.
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// But since Linux doesn't even understand this yet, no issue.
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// Set a base address for ACPI of 0xc000
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pci_read_config_word(pcidev, 0x74, &temp);
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printk(KERN_INFO "acpibase was 0x%x\n", temp);
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pci_write_config_word(pcidev, 0x74, acpibase);
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pci_read_config_word(pcidev, 0x74, &temp);
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printk(KERN_INFO "acpibase is 0x%x\n", temp);
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// now enable acpi
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi enable reg was 0x%x\n", val);
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val |= 0x80;
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pci_write_config_byte(pcidev, 0x40, val);
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi enable reg after set is 0x%x\n", val);
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printk(KERN_INFO "acpi status: word at 0x56 is 0x%x\n",
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inw(acpibase+0x56));
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printk(KERN_INFO "acpi status: byte at 0x4b is 0x%x\n",
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inb(acpibase + 0x4b));
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#if 0
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// this hangs anyway, so what's the point.
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for(i = 0; i < 0x63; i += 16) {
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int j;
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printk(KERN_INFO "0x%x: ", i);
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for(j = 0; (j < 16) && ((j + i) < 0x63); j++)
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printk(KERN_INFO "%02x ", inb(acpibase + i + j));
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printk(KERN_INFO "\n");
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}
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// this hangs anyway, so what's the point.
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for(i = 0; i < 0x63; i += 16) {
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int j;
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printk(KERN_INFO "0x%x: ", i);
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for(j = 0; (j < 16) && ((j + i) < 0x63); j++)
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printk(KERN_INFO "%02x ", inb(acpibase + i + j));
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printk(KERN_INFO "\n");
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}
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#endif
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// now that it's on, get in there and call off the dogs.
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// that's the recommended thing to do if MD40 iso on.
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outw(0, acpibase + 0x56);
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// does this help too?
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outb(0, acpibase + 0x4b);
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// ah ha! have to SET, NOT CLEAR!
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outb(0x40, acpibase + 0x56);
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printk(KERN_INFO "acpibase + 0x56 is 0x%x\n",
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inb(acpibase+0x56));
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val &= (~0x80);
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pci_write_config_byte(pcidev, 0x40, val);
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi disable reg after set is 0x%x\n", val);
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// now that it's on, get in there and call off the dogs.
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// that's the recommended thing to do if MD40 iso on.
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outw(0, acpibase + 0x56);
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// does this help too?
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outb(0, acpibase + 0x4b);
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// ah ha! have to SET, NOT CLEAR!
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outb(0x40, acpibase + 0x56);
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printk(KERN_INFO "acpibase + 0x56 is 0x%x\n",
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inb(acpibase+0x56));
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val &= (~0x80);
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pci_write_config_byte(pcidev, 0x40, val);
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pci_read_config_byte(pcidev, 0x40, &val);
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printk(KERN_INFO "acpi disable reg after set is 0x%x\n", val);
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} else {
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printk(KERN_EMERG "Can't find south bridge!\n");
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printk(KERN_EMERG "Can't find south bridge!\n");
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}
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printk(KERN_INFO "Southbridge fixup done for SIS 503\n");
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