diff --git a/Kconfig b/Kconfig index 4783a50185..53c2f9a2be 100644 --- a/Kconfig +++ b/Kconfig @@ -84,6 +84,8 @@ config SOUTHBRIDGE_INTEL_I82371EB # Super I/Os: config SUPERIO_WINBOND_W83627HF boolean +config SUPERIO_FINTEK_F71805F + boolean # Source all northbridge/southbridge/superio Kconfig files: source northbridge/intel/i440bxemulation/Kconfig diff --git a/superio/fintek/f71805f/Makefile b/superio/fintek/f71805f/Makefile new file mode 100644 index 0000000000..916c3046b4 --- /dev/null +++ b/superio/fintek/f71805f/Makefile @@ -0,0 +1,29 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 Corey Osgood +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ifeq ($(CONFIG_SUPERIO_FINTEK_F71805F),y) + +STAGE0_CHIPSET_OBJ += $(obj)/superio/fintek/f71805f/stage1.o +STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o + +# Always add to variables, as there could be more than one Super I/O. +STAGE2_CHIPSET_OBJ += $(obj)/superio/fintek/f71805f/superio.o + +endif diff --git a/superio/fintek/f71805f/dts b/superio/fintek/f71805f/dts new file mode 100644 index 0000000000..943c64215a --- /dev/null +++ b/superio/fintek/f71805f/dts @@ -0,0 +1,53 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Corey Osgood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +{ + /* Floppy */ + floppydev = "0x0"; + floppyenable = "0"; + floppyio = "0x3f0"; + floppyirq = "6"; + floppydrq = "2"; + + /* Parallel port */ + ppdev = "1"; + ppenable = "1"; + ppio = "0x378"; + ppirq = "7"; + + /* Note: renaming from comx to spx may have broken the DTS + * We'll find out later */ + /* Serial Port 1 */ + sp1dev = "2"; + sp1enable = "1"; + sp1io = "0x3f8"; + sp1irq = "4"; + + /* Serial Port 2 */ + sp2dev = "3"; + sp2enable = "1"; + sp2io = "0x2f8"; + sp2irq = "3"; + + /* Hardware Monitor */ + hwmdev = "0xb"; + hwmenable = "0"; + hwmio = "0xec00"; +}; diff --git a/superio/fintek/f71805f/f71805f.h b/superio/fintek/f71805f/f71805f.h new file mode 100644 index 0000000000..48a33a3f07 --- /dev/null +++ b/superio/fintek/f71805f/f71805f.h @@ -0,0 +1,36 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Corey Osgood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Datasheet: + * - Name: F71805F/FG Super H/W Monitor + LPC IO + * - URL: http://www.fintek.com.tw/eng/products.asp?BID=1&SID=17 + * - PDF: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf + * - Revision: V0.25P + */ + +/* Logical Device Numbers (LDN). */ +#define F71805F_FDC 0x00 /* Floppy */ +#define F71805F_SP1 0x01 /* UART1 */ +#define F71805F_SP2 0x02 /* UART2 */ +#define F71805F_PP 0x03 /* Parallel Port */ +#define F71805F_HWM 0x04 /* Hardware Monitor */ +#define F71805F_GPIO 0x06 /* General Purpose I/O (GPIO) */ +#define F71805F_PME 0x0a /* Power Management Events (PME) */ diff --git a/superio/fintek/f71805f/stage1.c b/superio/fintek/f71805f/stage1.c new file mode 100644 index 0000000000..e15fed1e6e --- /dev/null +++ b/superio/fintek/f71805f/stage1.c @@ -0,0 +1,41 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright 2007 Corey Osgood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include "f71805f.h" + +static inline void f71805f_rawpnp_enter_ext_func_mode(u8 dev) +{ + /* Fintek F71805f needs this only once, but Winbond needs it twice. + * Perhaps modify rawpnp_enter_ext_func_mode() to only do it once, + * then modify the winbond to call it twice? */ + outb(0x87, dev); +} + +void f71805f_enable_serial(u8 dev, u8 serial, u16 iobase) +{ + f71805f_rawpnp_enter_ext_func_mode(dev); + rawpnp_set_logical_device(dev, serial); + rawpnp_set_enable(dev, 0); + rawpnp_set_iobase(dev, PNP_IDX_IO0, iobase); + rawpnp_set_enable(dev, 1); + rawpnp_exit_ext_func_mode(dev); +} diff --git a/superio/fintek/f71805f/superio.c b/superio/fintek/f71805f/superio.c new file mode 100644 index 0000000000..71ee13e2a8 --- /dev/null +++ b/superio/fintek/f71805f/superio.c @@ -0,0 +1,117 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright 2007 Corey Osgood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Ported from v2 driver */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "f71805f.h" + +static void enable_dev(struct device *dev); +void f71805f_pnp_set_resources(struct device *dev); +void f71805f_pnp_set_resources(struct device *dev); +void f71805f_pnp_enable_resources(struct device *dev); +void f71805f_pnp_enable(struct device *dev); +static void f71805f_init(struct device *dev); + +static void pnp_enter_conf_state(struct device *dev); +static void pnp_exit_conf_state(struct device *dev); + +static void pnp_enter_conf_state(struct device *dev) +{ + outb(0x87, dev->path.u.pnp.port); +} + +static void pnp_exit_conf_state(struct device *dev) +{ + outb(0xaa, dev->path.u.pnp.port); +} + +void f71805f_pnp_set_resources(struct device *dev) +{ + pnp_enter_conf_state(dev); + pnp_set_resources(dev); + pnp_exit_conf_state(dev); +} + +void f71805f_pnp_enable_resources(struct device *dev) +{ + pnp_enter_conf_state(dev); + pnp_enable_resources(dev); + pnp_exit_conf_state(dev); +} + +void f71805f_pnp_enable(struct device *dev) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, dev->enabled) + pnp_exit_conf_state(dev); +} + +static void f71805f_init(struct device *dev) +{ + struct superio_smsc_f71805f_config *conf = dev->chip_info; + struct resource *res0, *res1; + + if (!dev->enabled) + return; + + switch (dev->path.u.pnp.device) { + case F71805F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + //TODO: needed? fix or remove? + //init_uart8250(res0->base, &conf->sp1); + break; + + case F71805F_SP2: + res1 = find_resource(dev, PNP_IDX_IO0); + //init_uart8250(res0->base, &conf->sp2); + break; + + /* No KBC on F71805f */ + } +} + +static struct device_operations ops; +static struct pnp_info pnp_dev_info[] = { + { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + /* TODO: Everything else */ +}; + +static void phase2_setup_scan_bus(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +static struct device_operations ops = { + .phase2_setup_scan_bus = phase2_setup_scan_bus, + .phase4_read_resources = pnp_read_resources, + .phase4_set_resources = f71805f_pnp_set_resources, + .phase4_enable_disable = f71805f_pnp_enable_resources, + .phase5_enable_resources = f71805f_pnp_enable, + .phase6_init = f71805f_init, +};