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mb/google/nissa/var/telith: Configure Acoustic noise mitigation

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- Enable Acoustic noise mitigation
- Set slow slew rate VCCIA and VCCGT to SLEW_FAST_8
- Set FastPkgCRampDisable VCCIA and VCCGT to 1

BUG=b:387056119
BRANCH=none
TEST=built firmware and verified by power team, and noise pass.

Change-Id: I11e1fae6d0b8508760090956ca6d77b012aa4bad
Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85826
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Kun Liu 2025-01-02 16:24:22 +08:00 • committed by Subrata Banik
commit 466343a205
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/google/brya/variants/telith/overridetree.cb
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@ -20,6 +20,13 @@ end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
# Acoustic settings
register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
# EMMC Tx CMD Delay
# Refer to EDS-Vol2-42.3.7.
# [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.