mb/google/bluey: Move charging functions to dedicated file

This patch isolates all charging-related functionality, including
enabling and disabling charging and reading SPMI registers, into a new
dedicated file, charging.c. This improves code organization and
readability by separating concerns, making the codebase easier to
maintain.

Additionally, `enable_battery_charging` is renamed to
`enable_slow_battery_charging` to explicitly state the maximum current
is 1A. The charging enablement logic is also moved to occur before
the AOP firmware is loaded.

TEST=Able to build and boot google/quenbi.

Change-Id: Ieb374cb34814e8eab8dc2ad6f5fb435190167bc7
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89021
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-09-03 10:40:35 +05:30
commit 45d1f9cce4
4 changed files with 34 additions and 25 deletions

View file

@ -10,4 +10,6 @@ bootblock-y += bootblock.c
romstage-y += romstage.c
romstage-y += charging.c
ramstage-y += mainboard.c

View file

@ -38,5 +38,6 @@
#endif
void setup_chromeos_gpios(void);
void enable_slow_battery_charging(void);
#endif /* MAINBOARD_GOOGLE_BLUEY_BOARD_H */

View file

@ -0,0 +1,29 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "board.h"
#include <soc/qcom_spmi.h>
#define SMB1_SLAVE_ID 0x07
#define SMB2_SLAVE_ID 0x0A
#define SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG 0x2666
#define SMB1_CHGR_MAX_FCC_CFG ((SMB1_SLAVE_ID << 16) | SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG)
#define SMB2_CHGR_MAX_FCC_CFG ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG)
#define SCHG_CHGR_CHARGING_ENABLE_CMD 0x2642
#define SMB1_CHGR_CHRG_EN_CMD ((SMB1_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
#define SMB2_CHGR_CHRG_EN_CMD ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
#define FCC_1A_STEP_50MA 0x14
#define CHRG_ENABLE 0x01
/*
* Enable charging w/ 1A Icurrent supply at max.
*/
void enable_slow_battery_charging(void)
{
/* Configure FCC and enable charging */
printk(BIOS_INFO, "Use slow charging without fast charge support\n");
spmi_write8(SMB1_CHGR_MAX_FCC_CFG, FCC_1A_STEP_50MA);
spmi_write8(SMB2_CHGR_MAX_FCC_CFG, FCC_1A_STEP_50MA);
spmi_write8(SMB1_CHGR_CHRG_EN_CMD, CHRG_ENABLE);
spmi_write8(SMB2_CHGR_CHRG_EN_CMD, CHRG_ENABLE);
}

View file

@ -5,32 +5,9 @@
#include <gpio.h>
#include <soc/aop_common.h>
#include <soc/qclib_common.h>
#include <soc/qcom_spmi.h>
#include <soc/shrm.h>
#include <soc/watchdog.h>
#define SMB1_SLAVE_ID 0x07
#define SMB2_SLAVE_ID 0x0A
#define SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG 0x2666
#define SMB1_CHGR_MAX_FCC_CFG ((SMB1_SLAVE_ID << 16) | SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG)
#define SMB2_CHGR_MAX_FCC_CFG ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_MAX_FAST_CHARGE_CURRENT_CFG)
#define SCHG_CHGR_CHARGING_ENABLE_CMD 0x2642
#define SMB1_CHGR_CHRG_EN_CMD ((SMB1_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
#define SMB2_CHGR_CHRG_EN_CMD ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
#define FCC_1A_STEP_50MA 0x14
#define CHRG_ENABLE 0x01
static void enable_battery_charging(void)
{
/* Configure FCC and enable charging */
printk(BIOS_INFO, "Use slow charging without fast charge support\n");
spmi_write8(SMB1_CHGR_MAX_FCC_CFG, FCC_1A_STEP_50MA);
spmi_write8(SMB2_CHGR_MAX_FCC_CFG, FCC_1A_STEP_50MA);
spmi_write8(SMB1_CHGR_CHRG_EN_CMD, CHRG_ENABLE);
spmi_write8(SMB2_CHGR_CHRG_EN_CMD, CHRG_ENABLE);
}
void platform_romstage_main(void)
{
/* Watchdog must be checked first to avoid erasing watchdog info later. */
@ -41,12 +18,12 @@ void platform_romstage_main(void)
/* QCLib: DDR init & train */
qclib_load_and_run();
enable_slow_battery_charging();
aop_fw_load_reset();
qclib_rerun();
enable_battery_charging();
/*
* Enable this power rail now for FPMCU stability prior to
* its reset being deasserted in ramstage. This applies