cpu/intel: Use the common code to initialize the romstage timestamps

The initial timestamps are now pushed on the stack when entering the
romstage C code.

Tested on Asus P5QC.

Change-Id: I88e972caafff5c53d8e68e85415f920c7341b92d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/cpu/intel/car/romstage.c

@@ -17,6 +17,7 @@
 #include <cpu/x86/mtrr.h>
 #include <arch/symbols.h>
 #include <program_loading.h>
+#include <timestamp.h>
 
 #define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
 
@@ -59,6 +60,8 @@ static void romstage_main(unsigned long bist)
  */
 asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
 {
+	timestamp_init(base_timestamp);
+	timestamp_add_now(TS_START_ROMSTAGE);
 	romstage_main(bist);
 }
 #endif

src/cpu/intel/haswell/romstage.c

@@ -77,9 +77,6 @@ void romstage_common(const struct romstage_params *params)
 	int boot_mode;
 	int wake_from_s3;
 
-	timestamp_init(get_initial_timestamp());
-	timestamp_add_now(TS_START_ROMSTAGE);
-
 	if (params->bist == 0)
 		enable_lapic();