From 44fcbf84b32bfbc2566b5b08a4681fc29b14285f Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 30 Jan 2026 09:46:52 +0100 Subject: [PATCH] soc/intel/snowridge: Move defines to soc/pci_devs.h Move the defines for PCI register SMM_FEATURE_CONTROL to the header soc/pci_devs.h like it's done on other server platforms as well. While on it add BIT1 that will be used in the following commit. TEST=Not a function change, thus untested. Change-Id: Ib05bb129f069ab1a6f4752a2dac829b3b7b41ec9 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/91016 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Paul Menzel --- src/soc/intel/snowridge/include/soc/pci_devs.h | 6 ++++++ src/soc/intel/snowridge/lockdown.c | 4 ---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/snowridge/include/soc/pci_devs.h b/src/soc/intel/snowridge/include/soc/pci_devs.h index ca50bf8eb1..09336c0724 100644 --- a/src/soc/intel/snowridge/include/soc/pci_devs.h +++ b/src/soc/intel/snowridge/include/soc/pci_devs.h @@ -68,6 +68,12 @@ /* Stack U0. */ #define UBOX_DEV_RACU _UBOX0_DEV(0x00, 1) + +#define SMM_FEATURE_CONTROL 0x8c +#define SMM_CODE_CHK_EN BIT(2) +#define SMM_FC_CPU_SAVE_EN BIT(1) +#define SMM_FEATURE_CONTROL_LOCK BIT(0) + #define UBOX_DEV_NCDECS _UBOX0_DEV(0x00, 2) /* Stack U1. */ diff --git a/src/soc/intel/snowridge/lockdown.c b/src/soc/intel/snowridge/lockdown.c index b74b74ca4b..485d3413d3 100644 --- a/src/soc/intel/snowridge/lockdown.c +++ b/src/soc/intel/snowridge/lockdown.c @@ -8,10 +8,6 @@ #include #include -#define SMM_FEATURE_CONTROL 0x8c -#define SMM_CODE_CHK_EN (1 << 2) -#define SMM_FEATURE_CONTROL_LOCK (1 << 0) - static void pmc_lockdown_cfg(int chipset_lockdown) { pmc_or_mmio32(PMSYNC_TPR_CFG, PCH2CPU_TPR_CFG_LOCK);