cpu/x86/tsc: Deduplicate Makefile logic
The code under `cpu/x86/tsc` is only compiled in when its `Makefile.inc` is included from platform (CPU/SoC) code and the `UDELAY_TSC` Kconfig option is enabled. Include `cpu/x86/tsc/Makefile.inc` once from `cpu/x86/Makefile.inc` and drop the now-redundant inclusions from platform code. Also, deduplicate the `UDELAY_TSC` guards. Change-Id: I41e96026f37f19de954fd5985b92a08cb97876c1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57456 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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34 changed files with 7 additions and 39 deletions
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@ -7,7 +7,6 @@ ramstage-y += chip_name.c
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ramstage-y += model_14_init.c
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subdirs-y += ../../mtrr
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subdirs-y += ../../../x86/tsc
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subdirs-y += ../../../x86/lapic
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subdirs-y += ../../../x86/cache
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subdirs-y += ../../../x86/mtrr
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@ -10,7 +10,6 @@ smm-y += udelay.c
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subdirs-y += ../../mtrr
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subdirs-y += ../../smm
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subdirs-y += ../../../x86/tsc
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subdirs-y += ../../../x86/lapic
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subdirs-y += ../../../x86/cache
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subdirs-y += ../../../x86/mtrr
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@ -7,7 +7,6 @@ ramstage-y += chip_name.c
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ramstage-y += model_16_init.c
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subdirs-y += ../../mtrr
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subdirs-y += ../../../x86/tsc
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subdirs-y += ../../../x86/lapic
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subdirs-y += ../../../x86/cache
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subdirs-y += ../../../x86/mtrr
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@ -8,7 +8,6 @@ ramstage-y += model_16_init.c
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ramstage-y += update_microcode.c
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subdirs-y += ../../mtrr
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subdirs-y += ../../../x86/tsc
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subdirs-y += ../../../x86/lapic
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subdirs-y += ../../../x86/cache
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subdirs-y += ../../../x86/mtrr
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