From 43f7c537f8fefee4babb354c45022518618538dd Mon Sep 17 00:00:00 2001 From: Lei Cao Date: Tue, 20 May 2025 14:29:35 +0800 Subject: [PATCH] mb/google/trulo/var/pujjocento: update GPP_R4/GPP_R5 setting update GPP_R4/GPP_R5 setting based on pujjocento proto schematic. BUG=b:409752486 TEST=emerge-nissa sys-boot/coreboot sys-boot/chromeos-bootimage Change-Id: I5a2926a074e801162972d950c62002352fb5cf6e Signed-off-by: Lei Cao Reviewed-on: https://review.coreboot.org/c/coreboot/+/87756 Reviewed-by: Kun Liu Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/mainboard/google/brya/variants/pujjocento/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/pujjocento/gpio.c b/src/mainboard/google/brya/variants/pujjocento/gpio.c index 488038b9aa..efa8249e88 100644 --- a/src/mainboard/google/brya/variants/pujjocento/gpio.c +++ b/src/mainboard/google/brya/variants/pujjocento/gpio.c @@ -314,9 +314,9 @@ static const struct pad_config gpio_table[] = { /* R3 : HDA_SDI0 ==> HDA_SDIN0 */ PAD_CFG_NF(GPP_R3, NONE, DEEP, NF1), /* R4 : HDA_RST# ==> HDA_RST# */ - PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_R4, NONE, DEEP, NF3), /* R5 : HDA_SDI1 ==> HDA_SDIN1 */ - PAD_CFG_NF(GPP_R5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* R6 : DMIC_CLK_A_1A ==> DMIC_WCAM_CLK_R */ PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), /* R7 : DMIC_DATA_1A ==> DMIC_WCAM_DATA */