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mb/var/uldrenite: Fix ISH UART port and VR configuration mismatch

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During Uldrenite development, the ISH UART port design and VR settings
were changed, so the switching mechanism was implemented based on the
board ID. Uldrino adopts the latest Uldrenite design; however, its
board ID starts from 0. To resolve this issue, an additional FW_CONFIG
field is added to further distinguish between Uldrenite and Uldrino.

BUG=b:450182476
TEST=Verified the ISH log and used the servod board to dump the CPU
log for checking PMC Descriptor Record 7 at offset 0xC33.

Change-Id: Id24659d6f910de1d3da36c5da808fd768dbdbc37
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89457
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
This commit is contained in:
John Su 2025-10-08 17:48:20 +08:00 • committed by Matt DeVillier
commit 43df7b14ae
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/uldrenite/variant.c
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@ -136,7 +136,7 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
}
/* b/415605630: Support different ISH UART mappings according the board id */
if (board_version < 2) {
if (fw_config_probe(FW_CONFIG(SERIES, SERIES_ULDRENITE)) && board_version < 2) {
/* Override ISH UART0 to ISH UART1 */
gpio_padbased_override(padbased_table, switch_ish_uart1_pads,
ARRAY_SIZE(switch_ish_uart1_pads));
@ -184,7 +184,7 @@ void variant_update_descriptor(void)
uint32_t board_version = board_id();
/* b/404126972: Only this phase has M/B with both FIVR and MBVR. */
if (board_version != 1)
if (fw_config_probe(FW_CONFIG(SERIES, SERIES_ULDRENITE)) && board_version != 1)
return;
/* VccanaVrLocation = "VCCANA is CPU FIVR" */