erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

util/amdfwtool: Add binary parsing

Browse source 
This adds parsing for some more possible firmware blobs on AMD.
These binaries are used on a mainboard based on glinda SOC.

Tested: Boot birman_plus mainboard

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I78d7a9dba71de557e0a9a885d8561eea1f4191ef
Original-signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84373
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maximilian Brune 2024-09-15 08:27:00 -07:00 • committed by Matt DeVillier
commit 43a54e3b1b
3 changed files with 105 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

29
util/amdfwtool/amdfwtool.c
View file

@ -172,12 +172,14 @@ amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_FW_PSP_SMU_FIRMWARE, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMU_FIRMWARE, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SECURED_DEBUG, .level = PSP_LVL2 | PSP_LVL2_AB,
.skip_hashing = true },
.skip_hashing = true },
{ .type = AMD_FW_PSP_TEEIPKEY, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB,
.skip_hashing = true },
{ .type = AMD_FW_ABL_PUBKEY, .level = PSP_BOTH | PSP_BOTH_AB },
{ .type = AMD_PSP_FUSE_CHAIN, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_TRUSTLETS, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_TRUSTLETKEY, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_BOOT_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB },
@ -187,6 +189,7 @@ amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_HW_IPCFG, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_HW_IPCFG, .subprog = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_HW_IPCFG, .subprog = 2, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
{ .type = AMD_TOKEN_UNLOCK, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_SEC_GASKET, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB },
@ -226,7 +229,8 @@ amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_FW_SPL, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MSMU, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MSMU, .subprog = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MPIO, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH | PSP_LVL2_AB },
@ -235,6 +239,7 @@ amd_fw_entry amd_psp_fw_table[] = {
.generate_manifest = true },
{ .type = AMD_RIB, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_RIB, .subprog = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_RIB, .subprog = 2, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MPDMA_TF, .level = PSP_BOTH | PSP_BOTH_AB },
{ .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
{ .type = AMD_FW_GMI3_PHY, .level = PSP_BOTH | PSP_BOTH_AB },
@ -242,18 +247,33 @@ amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_FW_AMF_SRAM, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_DRAM, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_DRAM, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MFD_MPM, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MFD_MPM, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_FCFG_TABLE, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_WLAN, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_WLAN, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_WLAN, .inst = 2, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_WLAN, .inst = 3, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_AMF_MFD, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
{ .type = AMD_FW_MPCCX, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MPCCX, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MPCCX, .subprog = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_LSDMA, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_C20_MP, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_MINIMSMU, .inst = 0, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_MINIMSMU, .inst = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_MINIMSMU, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_GFXIMU_0, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_GFXIMU_0, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_GFXIMU_1, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_GFXIMU_1, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_GFXIMU_2, .level = PSP_BOTH | PSP_LVL2_AB },
{ .type = AMD_FW_SRAM_FW_EXT, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_UMSMU, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_S3IMG, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_USBDP, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_USBSS, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_USB4, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_INVALID },
};
@ -303,6 +323,7 @@ amd_bios_entry amd_bios_table[] = {
{ .type = AMD_BIOS_BIN,
.reset = 1, .copy = 1, .zlib = 1, .inst = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_APOB_NV, .level = BDT_LVL2 },
{ .type = AMD_BIOS_NV_ST, .level = BDT_LVL2 },
{ .type = AMD_BIOS_PMUI, .inst = 1, .subpr = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 0, .level = BDT_BOTH },

10
util/amdfwtool/amdfwtool.h
View file

@ -52,6 +52,7 @@ typedef enum _amd_fw_type {
AMD_FW_PSP_TRUSTLETKEY = 0x0d,
AMD_FW_PSP_SMU_FIRMWARE2 = 0x12,
AMD_DEBUG_UNLOCK = 0x13,
AMD_FW_PSP_TEEIPKEY = 0x15,
AMD_BOOT_DRIVER = 0x1b,
AMD_SOC_DRIVER = 0x1c,
AMD_DEBUG_DRIVER = 0x1d,
@ -103,6 +104,7 @@ typedef enum _amd_fw_type {
AMD_RIB = 0x76,
AMD_FW_AMF_SRAM = 0x85,
AMD_FW_AMF_DRAM = 0x86,
AMD_FW_MFD_MPM = 0x87,
AMD_FW_AMF_WLAN = 0x88,
AMD_FW_AMF_MFD = 0x89,
AMD_FW_MPDMA_TF = 0x8c,
@ -114,8 +116,15 @@ typedef enum _amd_fw_type {
AMD_FW_C20_MP = 0x95,
AMD_FW_FCFG_TABLE = 0x98,
AMD_FW_MINIMSMU = 0x9a,
AMD_FW_GFXIMU_0 = 0x9b,
AMD_FW_GFXIMU_1 = 0x9c,
AMD_FW_GFXIMU_2 = 0x9d,
AMD_FW_SRAM_FW_EXT = 0x9d,
AMD_FW_UMSMU = 0xa2,
AMD_FW_S3IMG = 0xa0,
AMD_FW_USBDP = 0xa4,
AMD_FW_USBSS = 0xa5,
AMD_FW_USB4 = 0xa6,
AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */
AMD_FW_GEC,
AMD_FW_XHCI,
@ -137,6 +146,7 @@ typedef enum _amd_bios_type {
AMD_BIOS_EARLY_VGA = 0x69,
AMD_BIOS_MP2_CFG = 0x6a,
AMD_BIOS_PSP_SHARED_MEM = 0x6b,
AMD_BIOS_NV_ST = 0x6d,
AMD_BIOS_L2_PTR = 0x70,
AMD_BIOS_INVALID,
AMD_BIOS_SKIP

70
util/amdfwtool/data_parse.c
View file

@ -208,6 +208,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "PSP_HW_IPCFG_FILE_SUB1") == 0) {
fw_type = AMD_HW_IPCFG;
subprog = 1;
} else if (strcmp(fw_name, "PSP_HW_IPCFG_FILE_SUB2") == 0) {
fw_type = AMD_HW_IPCFG;
subprog = 2;
} else if (strcmp(fw_name, "PSP_SMUFW1_SUB1_FILE") == 0) {
fw_type = AMD_FW_PSP_SMU_FIRMWARE;
subprog = 1;
@ -220,6 +223,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "PSP_SMUFW2_SUB1_FILE") == 0) {
fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
subprog = 1;
} else if (strcmp(fw_name, "PSP_TEEIPKEY_FILE") == 0) {
fw_type = AMD_FW_PSP_TEEIPKEY;
subprog = 0;
} else if (strcmp(fw_name, "PSP_SMUFW2_SUB2_FILE") == 0) {
fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
subprog = 2;
@ -341,6 +347,14 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
fw_type = AMD_FW_AMF_DRAM;
subprog = 0;
instance = 1;
} else if (strcmp(fw_name, "MFD_MPM_TEE_INS0") == 0) {
fw_type = AMD_FW_MFD_MPM;
subprog = 0;
instance = 0;
} else if (strcmp(fw_name, "MFD_MPM_TEE_INS1") == 0) {
fw_type = AMD_FW_MFD_MPM;
subprog = 0;
instance = 1;
} else if (strcmp(fw_name, "AMF_WLAN_FILE_INS0") == 0) {
fw_type = AMD_FW_AMF_WLAN;
subprog = 0;
@ -349,12 +363,23 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
fw_type = AMD_FW_AMF_WLAN;
subprog = 0;
instance = 1;
} else if (strcmp(fw_name, "AMF_WLAN_FILE_INS2") == 0) {
fw_type = AMD_FW_AMF_WLAN;
subprog = 0;
instance = 2;
} else if (strcmp(fw_name, "AMF_WLAN_FILE_INS3") == 0) {
fw_type = AMD_FW_AMF_WLAN;
subprog = 0;
instance = 3;
} else if (strcmp(fw_name, "AMF_MFD_FILE") == 0) {
fw_type = AMD_FW_AMF_MFD;
subprog = 0;
} else if (strcmp(fw_name, "MPCCX_FILE") == 0) {
fw_type = AMD_FW_MPCCX;
subprog = 0;
} else if (strcmp(fw_name, "MPCCX_FILE_SUB1_FILE") == 0) {
fw_type = AMD_FW_MPCCX;
subprog = 1;
} else if (strcmp(fw_name, "LSDMA_FILE") == 0) {
fw_type = AMD_FW_LSDMA;
subprog = 0;
@ -362,6 +387,30 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
fw_type = AMD_FW_MINIMSMU;
instance = 0;
subprog = 0;
} else if (strcmp(fw_name, "MINIMSMU_FILE_SUB1_FILE") == 0) {
fw_type = AMD_FW_MINIMSMU;
instance = 0;
subprog = 1;
} else if (strcmp(fw_name, "PSP_GFX_IMMU_FILE_0") == 0) {
fw_type = AMD_FW_GFXIMU_0;
instance = 0;
subprog = 0;
} else if (strcmp(fw_name, "PSP_GFX_IMMU_FILE_01") == 0) {
fw_type = AMD_FW_GFXIMU_0;
instance = 0;
subprog = 1;
} else if (strcmp(fw_name, "PSP_GFX_IMMU_FILE_1") == 0) {
fw_type = AMD_FW_GFXIMU_1;
instance = 0;
subprog = 0;
} else if (strcmp(fw_name, "PSP_GFX_IMMU_FILE_11") == 0) {
fw_type = AMD_FW_GFXIMU_1;
instance = 0;
subprog = 1;
} else if (strcmp(fw_name, "PSP_GFX_IMMU_FILE_2") == 0) {
fw_type = AMD_FW_GFXIMU_2;
instance = 0;
subprog = 0;
} else if (strcmp(fw_name, "MINIMSMU_FILE_INS1") == 0) {
fw_type = AMD_FW_MINIMSMU;
instance = 1;
@ -416,6 +465,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "MSMU_FILE") == 0) {
fw_type = AMD_FW_MSMU;
subprog = 0;
} else if (strcmp(fw_name, "MSMU_FILE_SUB1_FILE") == 0) {
fw_type = AMD_FW_MSMU;
subprog = 1;
} else if (strcmp(fw_name, "DMCUB_FILE") == 0) {
fw_type = AMD_FW_DMCUB;
subprog = 0;
@ -447,6 +499,18 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "UMSMU_FILE") == 0) {
fw_type = AMD_FW_UMSMU;
subprog = 0;
} else if (strcmp(fw_name, "PSP_S3_IMG") == 0) {
fw_type = AMD_FW_S3IMG;
subprog = 0;
} else if (strcmp(fw_name, "PSP_USB_DP") == 0) {
fw_type = AMD_FW_USBDP;
subprog = 0;
} else if (strcmp(fw_name, "PSP_USB_SS") == 0) {
fw_type = AMD_FW_USBSS;
subprog = 0;
} else if (strcmp(fw_name, "PSP_USB_4") == 0) {
fw_type = AMD_FW_USB4;
subprog = 0;
} else if (strcmp(fw_name, "PSP_OEM_ABL_KEY_FILE") == 0) {
fw_type = AMD_FW_ABL_PUBKEY;
subprog = 0;
@ -471,6 +535,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "PSP_RIB_FILE_SUB1") == 0) {
fw_type = AMD_RIB;
subprog = 1;
} else if (strcmp(fw_name, "PSP_RIB_FILE_SUB2") == 0) {
fw_type = AMD_RIB;
subprog = 2;
} else if (strcmp(fw_name, "FEATURE_TABLE_FILE") == 0) {
fw_type = AMD_FW_FCFG_TABLE;
subprog = 0;
@ -559,6 +626,9 @@ static uint8_t find_register_fw_filename_bios_dir(char *fw_name, char *filename,
} else {
fw_type = AMD_BIOS_SKIP;
}
} else if (strcmp(fw_name, "PSP_MP2CFG_FILE") == 0) {
fw_type = AMD_BIOS_MP2_CFG;
subprog = 0;
} else {
fw_type = AMD_BIOS_INVALID;
}