Coding style and documentation fixes for AMP TinyGX (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@878 f3766cd6-281f-0410-b1cd-43a5c92072e9
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5 changed files with 22 additions and 29 deletions
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@ -33,7 +33,7 @@ config BOARD_AMP_TINYGX
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select SUPERIO_ITE_IT8716F
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select PIRQ_TABLE
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help
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SMP TinyGX
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AMP TinyGX
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endchoice
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@ -37,7 +37,7 @@
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pci@f,0 {
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/config/("southbridge/amd/cs5536/dts");
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/* Interrupt enables for LPC bus.
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* Each bit is an IRQ 0-15. */
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* Each bit is an IRQ 0-15. */
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lpc_serirq_enable = "0x000010da";
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/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
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lpc_serirq_polarity = "0x0000EF25";
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@ -37,7 +37,7 @@
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extern int smbus_read_byte(u16 device, u8 address);
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#define MANUALCONF 0 /* Do automatic strapped PLL config */
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#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
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#define PLLMSRHI 0x00001490 /* Manual settings for the PLL */
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#define PLLMSRLO 0x02000030
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#define DIMM0 ((u8) 0xA0)
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#define DIMM1 ((u8) 0xA2)
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@ -59,31 +59,28 @@ u8 spd_read_byte(u16 device, u8 address)
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u8 spdbyte;
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printk(BIOS_DEBUG, "spd_read_byte dev %04x\n", device);
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spdbyte = smbus_read_byte(device, address);
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printk(BIOS_DEBUG, " addr %02x returns %02x\n", address, spdbyte);
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return spdbyte;
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}
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/**
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* Placeholder in case we ever need it. Since this file is a
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* template for other motherboards, we want this here and we want the
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* call in the right place.
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*/
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* Placeholder in case we ever need it. Since this file is a template for
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* other boards, we want this here and we want the call in the right place.
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*/
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static void mb_gpio_init(void)
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{
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/* Early mainboard specific GPIO setup */
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}
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/**
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* main for initram for the AMD DB800 development platform.
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* It might seem that you could somehow do these functions in, e.g., the cpu
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* code, but the order of operations and what those operations are is VERY
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* strongly mainboard dependent. It's best to leave it in the mainboard code.
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*/
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* main() for initram.
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*
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* It might seem that you could somehow do these functions in, e.g., the CPU
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* code, but the order of operations and what those operations are is VERY
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* strongly mainboard dependent. It's best to leave it in the mainboard code.
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*/
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int main(void)
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{
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printk(BIOS_DEBUG, "Hi there from initram (stage1) main!\n");
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@ -110,8 +107,8 @@ int main(void)
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sdram_enable(DIMM0, DIMM1);
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printk(BIOS_DEBUG, "done sdram enable\n");
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/* Check low memory */
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/*ram_check(0x00000000, 640*1024); */
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/* Check low memory. */
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/* ram_check(0x00000000, 640 * 1024); */
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printk(BIOS_DEBUG, "stage1 returns\n");
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return 0;
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@ -41,14 +41,10 @@
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#define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */
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/*
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* AMD DB800 interrupt wiring.
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*
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* Devices are:
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*
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* FIXME
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* AMP TinyGX interrupt wiring.
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*
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* Devices are: FIXME
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*/
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE,
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PIRQ_VERSION,
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@ -62,7 +58,7 @@ const struct irq_routing_table intel_irq_routing_table = {
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */
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0x00, /* Checksum */
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{
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/* If you change the number of entries, change IRQ_SLOT_COUNT above! */
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/* If you change the number of entries, change SLOT_COUNT above! */
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/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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@ -36,18 +36,18 @@
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void hardware_stage1(void)
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{
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void it8716f_enable_serial(u8 dev, u8 serial, u16 iobase);
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post_code(POST_START_OF_MAIN);
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geodelx_msr_init();
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cs5536_stage1();
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/* NOTE: must do this AFTER the early_setup!
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* it is counting on some early MSR setup
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* for cs5536.
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/*
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* Note: Must do this AFTER the early_setup! It is counting on some
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* early MSR setup for CS5536.
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*/
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cs5536_disable_internal_uart();
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it8716f_enable_serial(0x2e, SERIAL_DEV, SERIAL_IOBASE);
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it8716f_enable_serial(0x2e, SERIAL_DEV, SERIAL_IOBASE);
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}
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void mainboard_pre_payload(void)
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