Coding style and documentation fixes for AMP TinyGX (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@878 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Uwe Hermann 2008-10-01 17:54:56 +00:00
commit 42e98f5d49
5 changed files with 22 additions and 29 deletions

View file

@ -33,7 +33,7 @@ config BOARD_AMP_TINYGX
select SUPERIO_ITE_IT8716F
select PIRQ_TABLE
help
SMP TinyGX
AMP TinyGX
endchoice

View file

@ -37,7 +37,7 @@
pci@f,0 {
/config/("southbridge/amd/cs5536/dts");
/* Interrupt enables for LPC bus.
* Each bit is an IRQ 0-15. */
* Each bit is an IRQ 0-15. */
lpc_serirq_enable = "0x000010da";
/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
lpc_serirq_polarity = "0x0000EF25";

View file

@ -37,7 +37,7 @@
extern int smbus_read_byte(u16 device, u8 address);
#define MANUALCONF 0 /* Do automatic strapped PLL config */
#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
#define PLLMSRHI 0x00001490 /* Manual settings for the PLL */
#define PLLMSRLO 0x02000030
#define DIMM0 ((u8) 0xA0)
#define DIMM1 ((u8) 0xA2)
@ -59,31 +59,28 @@ u8 spd_read_byte(u16 device, u8 address)
u8 spdbyte;
printk(BIOS_DEBUG, "spd_read_byte dev %04x\n", device);
spdbyte = smbus_read_byte(device, address);
printk(BIOS_DEBUG, " addr %02x returns %02x\n", address, spdbyte);
return spdbyte;
}
/**
* Placeholder in case we ever need it. Since this file is a
* template for other motherboards, we want this here and we want the
* call in the right place.
*/
* Placeholder in case we ever need it. Since this file is a template for
* other boards, we want this here and we want the call in the right place.
*/
static void mb_gpio_init(void)
{
/* Early mainboard specific GPIO setup */
}
/**
* main for initram for the AMD DB800 development platform.
* It might seem that you could somehow do these functions in, e.g., the cpu
* code, but the order of operations and what those operations are is VERY
* strongly mainboard dependent. It's best to leave it in the mainboard code.
*/
* main() for initram.
*
* It might seem that you could somehow do these functions in, e.g., the CPU
* code, but the order of operations and what those operations are is VERY
* strongly mainboard dependent. It's best to leave it in the mainboard code.
*/
int main(void)
{
printk(BIOS_DEBUG, "Hi there from initram (stage1) main!\n");
@ -110,8 +107,8 @@ int main(void)
sdram_enable(DIMM0, DIMM1);
printk(BIOS_DEBUG, "done sdram enable\n");
/* Check low memory */
/*ram_check(0x00000000, 640*1024); */
/* Check low memory. */
/* ram_check(0x00000000, 640 * 1024); */
printk(BIOS_DEBUG, "stage1 returns\n");
return 0;

View file

@ -41,14 +41,10 @@
#define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */
/*
* AMD DB800 interrupt wiring.
*
* Devices are:
*
* FIXME
* AMP TinyGX interrupt wiring.
*
* Devices are: FIXME
*/
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE,
PIRQ_VERSION,
@ -62,7 +58,7 @@ const struct irq_routing_table intel_irq_routing_table = {
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */
0x00, /* Checksum */
{
/* If you change the number of entries, change IRQ_SLOT_COUNT above! */
/* If you change the number of entries, change SLOT_COUNT above! */
/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */

View file

@ -36,18 +36,18 @@
void hardware_stage1(void)
{
void it8716f_enable_serial(u8 dev, u8 serial, u16 iobase);
post_code(POST_START_OF_MAIN);
geodelx_msr_init();
cs5536_stage1();
/* NOTE: must do this AFTER the early_setup!
* it is counting on some early MSR setup
* for cs5536.
/*
* Note: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
cs5536_disable_internal_uart();
it8716f_enable_serial(0x2e, SERIAL_DEV, SERIAL_IOBASE);
it8716f_enable_serial(0x2e, SERIAL_DEV, SERIAL_IOBASE);
}
void mainboard_pre_payload(void)