From 426d141d6e72a0b841f6b4c3536b790bf47922b7 Mon Sep 17 00:00:00 2001 From: Wei Shun Chang Date: Sat, 22 Nov 2014 03:20:41 +0800 Subject: [PATCH] auron: enable power limiting for thermal control Limit power to 12W at 90C and remove limit at 85C. BUG=chrome-os-partner:33995 BRANCH=none TEST=manual: To have the CPU consume maximum power it is necessary to stress both the CPU and the GPU. Bastion (chrome.supergiantgames.com) and/or webglsamples.googlecode.com can be useful for this. Testing this properly requires a script to report the running average power readings. The watch_power.sh script is attached to this issue in the partner tracker. 1) Run watch_power.sh continuously: localhost ~ # watch -n 0 bash -e /tmp/watch_power_v2.sh 2) Start WebGL Aquarium (or other stress apps). The power draw should be close to 15W if under enough load. 3) Watch until temperature climbs above 90C and is caught by the thermal zone 10 second poll, this can be sped up by blocking or removing the fan. 4) The ACPI thermal zone states should change to reflect that active[2] is now enabled and power consumption should drop to 12W. 5) Stop the stress apps and wait until the CPU cools off again, enable the fan again if it was removed. 6) The ACPI thermal zone state should switch back to active[3]. Signed-off-by: Wei Shun Chang Change-Id: If6be36f7b8eed9347ed60b90e5a265f4f8d31548 Reviewed-on: https://chromium-review.googlesource.com/231382 Reviewed-by: Shawn Nematbakhsh --- src/mainboard/google/auron/acpi/thermal.asl | 83 +++++++++++++++++++++ src/mainboard/google/auron/acpi_tables.c | 15 +++- src/mainboard/google/auron/thermal.h | 7 +- 3 files changed, 100 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/auron/acpi/thermal.asl b/src/mainboard/google/auron/acpi/thermal.asl index 2e2ced0f77..4c1185a896 100644 --- a/src/mainboard/google/auron/acpi/thermal.asl +++ b/src/mainboard/google/auron/acpi/thermal.asl @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include + // Thermal Zone Scope (\_TZ) @@ -118,6 +120,87 @@ Scope (\_TZ) Return (Local0) } + + /* CTDP Down */ + Method (_AC0) { + If (LLessEqual (\FLVL, 0)) { + Return (CTOK (CTL_TDP_THRESHOLD_OFF)) + } Else { + Return (CTOK (CTL_TDP_THRESHOLD_ON)) + } + } + + /* CTDP Nominal */ + Method (_AC1) { + If (LLessEqual (\FLVL, 1)) { + Return (CTOK (CTL_TDP_THRESHILD_NORMAL)) + } Else { + Return (CTOK (CTL_TDP_THRESHILD_NORMAL)) + } + } + + Name (_AL0, Package () { TDP0 }) + Name (_AL1, Package () { TDP1 }) + + PowerResource (TNP0, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 0)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (0, \FLVL) + + /* Enable Power Limit */ + \_SB.PCI0.MCHC.CTLE (CTL_TDP_POWER_LIMIT) + + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (1, \FLVL) + + /* Disable Power Limit */ + \_SB.PCI0.MCHC.CTLD () + + Notify (\_TZ.THRM, 0x81) + } + } + + PowerResource (TNP1, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 1)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (1, \FLVL) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (1, \FLVL) + Notify (\_TZ.THRM, 0x81) + } + } + + Device (TDP0) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 0) + Name (_PR0, Package () { TNP0 }) + } + + Device (TDP1) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 1) + Name (_PR0, Package () { TNP1 }) + } } } diff --git a/src/mainboard/google/auron/acpi_tables.c b/src/mainboard/google/auron/acpi_tables.c index efb17dc730..b827b607f9 100644 --- a/src/mainboard/google/auron/acpi_tables.c +++ b/src/mainboard/google/auron/acpi_tables.c @@ -35,6 +35,16 @@ extern const unsigned char AmlCode[]; +static void acpi_update_thermal_table(global_nvs_t *gnvs) +{ + gnvs->tmps = CTL_TDP_SENSOR_ID; + + gnvs->tcrt = CRITICAL_TEMPERATURE; + gnvs->tpsv = PASSIVE_TEMPERATURE; + gnvs->tmax = MAX_TEMPERATURE; + gnvs->flvl = 1; +} + static void acpi_create_gnvs(global_nvs_t *gnvs) { acpi_init_gnvs(gnvs); @@ -45,10 +55,7 @@ static void acpi_create_gnvs(global_nvs_t *gnvs) /* Disable USB ports in S5 */ gnvs->s5u0 = 0; - gnvs->tmps = TEMPERATURE_SENSOR_ID; - gnvs->tcrt = CRITICAL_TEMPERATURE; - gnvs->tpsv = PASSIVE_TEMPERATURE; - gnvs->tmax = MAX_TEMPERATURE; + acpi_update_thermal_table(gnvs); } unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/google/auron/thermal.h b/src/mainboard/google/auron/thermal.h index 338b16d890..93fb3e9cff 100644 --- a/src/mainboard/google/auron/thermal.h +++ b/src/mainboard/google/auron/thermal.h @@ -20,7 +20,12 @@ #ifndef THERMAL_H #define THERMAL_H -#define TEMPERATURE_SENSOR_ID 0 /* PECI */ +/* Control TDP Settings */ +#define CTL_TDP_SENSOR_ID 0 /* PECI */ +#define CTL_TDP_POWER_LIMIT 12 /* 12W */ +#define CTL_TDP_THRESHILD_NORMAL 0 /*Normal TDP Threshold*/ +#define CTL_TDP_THRESHOLD_OFF 85 /* Normal at 85C */ +#define CTL_TDP_THRESHOLD_ON 90 /* Limited at 90C */ /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 104