mb/google/nissa/var/yavilla: Add 1.2V enable pin in VCM
Add control for the 1.2V enable pin in VCM to comply the mipi camera power sequence. 2.8V enable --> 1.2V enable --> reset BUG=b:362386165 TEST=Run ITS test Change-Id: I495b2e266ee3d24ed3334bb9c173b3993d095e8e Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84211 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
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1 changed files with 7 additions and 4 deletions
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@ -404,17 +404,20 @@ chip soc/intel/alderlake
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#Controls
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register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
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register "gpio_panel.gpio[1].gpio_num" = "GPP_D3" # WCAM_RST_L
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register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
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register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
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#_ON
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register "on_seq.ops_cnt" = "2"
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register "on_seq.ops_cnt" = "3"
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register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
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register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
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register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
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#_OFF
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register "off_seq.ops_cnt" = "2"
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register "off_seq.ops_cnt" = "3"
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register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
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register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
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register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
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register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
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device i2c 0C on
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probe WFC WFC_MIPI_OVTI8856
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