mb/google/nissa/var/yavilla: Add 1.2V enable pin in VCM

Add control for the 1.2V enable pin in VCM to comply the mipi camera
power sequence.

2.8V enable --> 1.2V enable --> reset

BUG=b:362386165
TEST=Run ITS test

Change-Id: I495b2e266ee3d24ed3334bb9c173b3993d095e8e
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84211
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Wisley Chen 2024-09-04 17:16:13 +08:00 committed by Felix Held
commit 4258b8bb3d

View file

@ -404,17 +404,20 @@ chip soc/intel/alderlake
#Controls
register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
register "gpio_panel.gpio[1].gpio_num" = "GPP_D3" # WCAM_RST_L
register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
#_ON
register "on_seq.ops_cnt" = "2"
register "on_seq.ops_cnt" = "3"
register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
#_OFF
register "off_seq.ops_cnt" = "2"
register "off_seq.ops_cnt" = "3"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 0C on
probe WFC WFC_MIPI_OVTI8856