erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/mediatek/mt8196: Correct the region size for mcufw_reserved

Browse source 
Adjust the allocated region size for mcufw_reserved from 52K to 68K.

TEST=Build pass.
BUG=b:390334489

Change-Id: I1c17c1492d5568f4d51ff45e1fb90e067eae5cb1
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Jarried Lin 2025-01-22 19:19:41 +08:00 • committed by Yidi Lin
commit 4224d59d0e
1 changed files with 8 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

16
src/soc/mediatek/mt8196/include/soc/memlayout.ld
View file

@ -24,18 +24,18 @@ SECTIONS
/* EMPTY(0x0010bc90, 29K - 144) */
/*
* MCUPM exchanges data with kernel driver using SRAM 0x00113000 ~
* 0x0011ffff. The address is hardcoded in MCUPM image.
* 0x00123fff. The address is hardcoded in MCUPM image.
*/
REGION(mcufw_reserved, 0x00113000, 52K, 4K)
REGION(mcufw_reserved, 0x00113000, 68K, 4K)
/* End of regions that need to stay in SRAM. */
/* Regions can be moved to SRAM_L2C. */
CBFS_MCACHE(0x00120000, 16k)
VBOOT2_WORK(0x00124000, 12K)
FMAP_CACHE(0x00127000, 2k)
TPM_LOG(0x00127800, 2k)
TIMESTAMP(0x00128000, 1k)
CBFS_MCACHE(0x00124000, 16k)
VBOOT2_WORK(0x00128000, 12K)
FMAP_CACHE(0x0012B000, 2k)
TPM_LOG(0x0012B800, 2k)
TIMESTAMP(0x0012C000, 1k)
/* End of regions that can also be moved to SRAM_L2C. */
/* EMPTY(0x00128400, 95K) */
/* EMPTY(0x0012C400, 79K) */
SRAM_END(0x00140000)
/*