From 421c21c6cf2292d593aad3d88980be9cbb07181e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sat, 28 Mar 2026 06:58:29 +0000 Subject: [PATCH] soc/qualcomm/calypso: Initialize QSPI and QUPv3 in bootblock The bootblock requires early initialization of the Quad-SPI (QSPI) controller to enable reading firmware from flash memory. This commit adds calls to `quadspi_init()` with a 75 MHz bus clock and `qupv3_fw_init()` within `bootblock_soc_init()`. This ensures that the essential hardware for flash access and related QUPv3 functions are properly configured during the boot process. BUG=b:496650089 TEST=Able to build google/mensa. Change-Id: I225485cf601c62b1ba695eb61f786a1360790f41 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/91903 Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/soc/qualcomm/calypso/bootblock.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/soc/qualcomm/calypso/bootblock.c b/src/soc/qualcomm/calypso/bootblock.c index ce000dbc40..e277dcce76 100644 --- a/src/soc/qualcomm/calypso/bootblock.c +++ b/src/soc/qualcomm/calypso/bootblock.c @@ -2,6 +2,10 @@ #include #include +#include +#include + +#define SPI_BUS_CLOCK_FREQ (75 * MHz) void bootblock_soc_early_init(void) { @@ -11,5 +15,6 @@ void bootblock_soc_early_init(void) void bootblock_soc_init(void) { - /* Placeholder */ + quadspi_init(SPI_BUS_CLOCK_FREQ); + qupv3_fw_init(); }