v3: k8/m57sli wip1

This is not nearly complete, but just the current state of my tree.

k8/raminit.c does not compile at all. Lots of fixes are still needed to bring
it working into v3. I've gone through about 1/8 of the file, it errors out on
line 576 now.

The mcp55 files are in a very early state and also do not compile for me, so
I've disabled them by commenting out the select in mainboard/gigabyte/Kconfig.

Once northbridge/amd/k8/raminit.c builds, k8_ops needs to be added, then we
may actually see the first v3 k8 build. :)

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@713 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Peter Stuge 2008-08-02 03:34:05 +00:00
commit 41242a63c3
17 changed files with 5912 additions and 0 deletions

View file

@ -481,5 +481,6 @@
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)
#define PCI_BDF(bus,dev,func) ((bus) << 16 | (dev) << 11 | (func) << 8)
#define PCI_ADDR(bus,dev,func,where) (PCI_BDF((bus),(dev),(func)) << 4 | (where & 0xfff))
#endif /* DEVICE_PCI_DEF_H */

View file

@ -155,4 +155,33 @@
#define PCI_VENDOR_ID_CIRRUS 0x1013
#define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 /* Used by QEMU */
#define PCI_VENDIR_ID_NVIDIA 0x10de
/*
0360MCP55 LPC Bridge
0361MCP55 LPC Bridge
0362MCP55 LPC Bridge
0363MCP55 LPC Bridge
0364MCP55 LPC Bridge
0365MCP55 LPC Bridge
0366MCP55 LPC Bridge
0367MCP55 LPC Bridge
0368MCP55 SMBus
0369MCP55 Memory Controller
036aMCP55 Memory Controller
036bMCP55 SMU
036cMCP55 USB Controller
036dMCP55 USB Controller
036eMCP55 IDE
0370MCP55 PCI bridge
0371MCP55 High Definition Audio
0372MCP55 Ethernet
0373MCP55 Ethernet
0374MCP55 PCI Express bridge
0375MCP55 PCI Express bridge
0376MCP55 PCI Express bridge
0377MCP55 PCI Express bridge
0378MCP55 PCI Express bridge
037aMCP55 Memory Controller
*/
#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIBRIDGE 0x370
#endif /* DEVICE_PCI_IDS_H */