diff --git a/src/soc/mediatek/mt8196/booker.c b/src/soc/mediatek/mt8196/booker.c
index c571734f62..13a0248653 100644
--- a/src/soc/mediatek/mt8196/booker.c
+++ b/src/soc/mediatek/mt8196/booker.c
@@ -9,10 +9,6 @@
 #define REG_MCUSYS_RESERVED_REG2	(MCUCFG_BASE + 0xFFE8)
 
 #define POR_SBSX_CFG_CTL_OFFSET		(0x00450000 + 0x0A00)
-#define INSTANCE0_SBSX_POR_SBSX_CFG_CTL	(0x0A000000 + POR_SBSX_CFG_CTL_OFFSET)
-#define INSTANCE1_SBSX_POR_SBSX_CFG_CTL	(0x0A800000 + POR_SBSX_CFG_CTL_OFFSET)
-#define INSTANCE2_SBSX_POR_SBSX_CFG_CTL	(0x0B000000 + POR_SBSX_CFG_CTL_OFFSET)
-#define INSTANCE3_SBSX_POR_SBSX_CFG_CTL	(0x0B800000 + POR_SBSX_CFG_CTL_OFFSET)
 
 #define POR_MTU_BASE			0x790000
 #define POR_MTU_AUX_CTL_OFFSET		(POR_MTU_BASE + 0x0A08)
@@ -44,11 +40,12 @@ static const uint32_t booker_base[] = {
  */
 void booker_init(void)
 {
+	int i;
+
 	/* Enable CMO(cache maintenance operations) propagation */
-	clrbits64p(INSTANCE0_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
-	clrbits64p(INSTANCE1_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
-	clrbits64p(INSTANCE2_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
-	clrbits64p(INSTANCE3_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
+	for (i = 0; i < ARRAY_SIZE(booker_base); i++)
+		clrbits64p(booker_base[i] + POR_SBSX_CFG_CTL_OFFSET, BIT_DISABLE_CMO_PROP);
+
 	dsb();
 	isb();