diff --git a/src/mainboard/starlabs/adl/variants/hz/devicetree.cb b/src/mainboard/starlabs/adl/variants/hz/devicetree.cb
index c06ad29b9a..5fe89a5dbe 100644
--- a/src/mainboard/starlabs/adl/variants/hz/devicetree.cb
+++ b/src/mainboard/starlabs/adl/variants/hz/devicetree.cb
@@ -1,5 +1,6 @@
 chip soc/intel/alderlake
 	# FSP UPDs
+	register "cnvi_bt_core"			= "true"
 	register "eist_enable"			= "true"
 	register "enable_c6dram"		= "true"
 	register "energy_efficient_turbo"	= "true"