diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk
index 9b09628080..e997ec1e3f 100644
--- a/src/soc/mediatek/mt8189/Makefile.mk
+++ b/src/soc/mediatek/mt8189/Makefile.mk
@@ -8,6 +8,7 @@ all-y += ../common/uart.c
 
 bootblock-y += bootblock.c
 bootblock-y += ../common/mmu_operations.c
+bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
 
 romstage-y += ../common/cbmem.c
 romstage-y += emi.c
diff --git a/src/soc/mediatek/mt8189/bootblock.c b/src/soc/mediatek/mt8189/bootblock.c
index 89cd22d45f..ed78d65354 100644
--- a/src/soc/mediatek/mt8189/bootblock.c
+++ b/src/soc/mediatek/mt8189/bootblock.c
@@ -2,8 +2,10 @@
 
 #include <bootblock_common.h>
 #include <soc/mmu_operations.h>
+#include <soc/wdt.h>
 
 void bootblock_soc_init(void)
 {
 	mtk_mmu_init();
+	mtk_wdt_init();
 }
diff --git a/src/soc/mediatek/mt8189/include/soc/wdt.h b/src/soc/mediatek/mt8189/include/soc/wdt.h
new file mode 100644
index 0000000000..f6e808c23f
--- /dev/null
+++ b/src/soc/mediatek/mt8189/include/soc/wdt.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+/*
+ * This file is created based on MT8189 Functional Specification
+ * Chapter number: 8.2
+ */
+
+#ifndef __SOC_MEDIATEK_MT8189_INCLUDE_SOC_WDT_H__
+#define __SOC_MEDIATEK_MT8189_INCLUDE_SOC_WDT_H__
+
+#include <soc/wdt_common.h>
+
+#define MTK_WDT_SPM_THERMAL_VAL 1
+
+DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
+DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
+DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
+
+#endif /* __SOC_MEDIATEK_MT8189_INCLUDE_SOC_WDT_H__ */
diff --git a/src/soc/mediatek/mt8189/wdt.c b/src/soc/mediatek/mt8189/wdt.c
new file mode 100644
index 0000000000..ca6518bc2e
--- /dev/null
+++ b/src/soc/mediatek/mt8189/wdt.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+/*
+ * This file is created based on MT8189 Functional Specification
+ * Chapter number: 8.2
+ */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/wdt.h>
+
+#define MTK_WDT_CLR_STATUS 0x230001FF
+
+void mtk_wdt_clr_status(void)
+{
+	write32(&mtk_wdt->wdt_mode, MTK_WDT_CLR_STATUS);
+}