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mb/google/brox/var/lotso: Update gpio setting

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For edge trigger,the default is "rising edge"(invert=0),
and it needs to "invert" (invert=1) for falling edge.

BUG=b:359437265
TEST=emerge-brox coreboot chromeos-bootimage
     oscilloscope measurement interrupt is triggered by falling edge

Change-Id: I132b43fd552d2babfbcd497bc6a017f354c69e10
Signed-off-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85966
Reviewed-by: Bob Moragues <moragues@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marx Wang <marx.wang@intel.corp-partner.google.com>
This commit is contained in:
Jian Tong 2025-01-14 11:14:20 +08:00 • committed by Karthik Ramasubramanian
commit 403f5f49bc
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brox/variants/lotso/gpio.c
View file

@ -57,6 +57,8 @@ static const struct pad_config override_gpio_table[] = {
/* GPP_F16 : [NF1: GSXCLK NF3: THC1_SPI2_CS# NF4: GSPI1_CS0#
* NF6: USB_C_GPP_F16] ==> GSPI1_SOC_TCHSCR_CS_L */
PAD_CFG_NF_LOCK(GPP_F16, NONE, NF4, LOCK_CONFIG),
/* GPP_F18 : [NF3: THC1_SPI2_INT# NF6: USB_C_GPP_F18] ==> TCHSCR_INT_ODL */
PAD_CFG_GPI_APIC(GPP_F18, NONE, DEEP, EDGE_SINGLE, INVERT),
/* GPP_S4 : SNDW2_CLK/DMIC_CLK_B0 ==> MEM_STRAP_0 */
PAD_CFG_GPI(GPP_S4, NONE, PLTRST),
/* GPP_S5 : SNDW2_DATA/DMIC_CLK_B1 ==> MEM_STRAP_1 */
@ -65,8 +67,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPI(GPP_S6, NONE, PLTRST),
/* GPP_S7 : SNDW3_DATA/DMIC_DATA1 ==> MEM_STRAP_3 */
PAD_CFG_GPI(GPP_S7, NONE, PLTRST),
/* GPP_F18 : [NF3: THC1_SPI2_INT# NF6: USB_C_GPP_F18] ==> TCHSCR_INT_ODL */
PAD_CFG_GPI_APIC(GPP_F18, NONE, DEEP, EDGE_SINGLE, NONE),
};